IP core handles soft errors
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IP core handles soft errors
By Chris Edwards, EE Times UK
December 1, 2000 (8:34 a.m. EST)
URL: http://www.eetimes.com/story/OEG20001201S0015
Iroc Technologies has developed what it reckons is the first intellectual property (IP) core to handle soft errors caused by alpha radiation. Based on the Sparc version 8 architecture, the IP contains protection elements for memory cells and logic. The core has been put into a test chip made by STMicroelectronics on a 0.25µm. It runs at up to 100MHz. Dr Michael Nicolaidis, Iroc's chief technical officer, says the core has more than 98% soft error coverage and is cheaper to implement than designs based on traditional techniques that depend on duplicate processing elements. Eric Dupont, CEO, added: "In developing this processor using a commercial standard-cell library, we have proven that our methodology is the first cost-effective solution to deal with the soft errors issue in commodity systems."
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