Intel SoCs aided by interconnect, IP library
Peter Clarke, EETimes
7/26/2011 7:04 AM EDT
LONDON – Intel now has the tools in place – in particular an on-chip interconnect fabric, an extensive IP library and software – to make a success of its system-on-chip engineering effort, according to Bill Leszinske, general manager of technical planning and business development at Intel's Atom processor SoC development group.
Intel has been striving to break out of the computer sector for many years and its system-on-chip engineering group is a key part of that effort.
To read the full article, click here
Related Semiconductor IP
- Simulation VIP for Ethernet UEC
- Bluetooth® Low Energy 6.2 PHY IP with Channel Sounding
- Simulation VIP for UALink
- General use, integer-N 4GHz Hybrid Phase Locked Loop on TSMC 28HPC
- JPEG XL Encoder
Related News
- Arteris IP FlexNoC Interconnect Licensed by Picocom for 5G New Radio Infrastructure Baseband SoCs
- PLDA Announces Robust Verification Toolset, Increasing Design Accuracy and Reducing Time-to-Production for Next Generation SoCs with CXL, PCIe 6.0 or Gen-Z Interconnect
- Rambus Joins the Intel Foundry Services (IFS) Accelerator IP Alliance to Enable State-of-the-Art SoCs
- CEVA Joins Intel Foundry Services Accelerator IP Alliance Program to Empower Cutting-Edge SoCs
Latest News
- Mixel MIPI IP Integrated into Automotive Radar Processors Supporting Safety-critical Applications
- GlobalFoundries and Navitas Semiconductor Partner to Accelerate U.S. GaN Technology and Manufacturing for AI Datacenters and Critical Power Applications
- VLSI EXPERT selects Innatera Spiking Neural Processors to build industry-led neuromorphic talent pool
- SkyWater Technology and Silicon Quantum Computing Team to Advance Hybrid Quantum-Classical Computing
- Dnotitia Revolutionizes AI Storage at SC25: New VDPU Accelerator Delivers Up to 9x Performance Boost