Ingenic Licenses Arteris Chip-to-Chip (C2C) IP Solution for Mobile Application Processors
Chip-to-Chip (C2C) Interconnect Technology Enables Lower Bill of Materials (BOM) Cost and Smaller Printed Circuit Board (PCB) Area for Smartphone and Tablet Application Processors
SUNNYVALE, CA, Feb 07, 2012 -- Arteris Inc., the inventor and leading supplier of network-on-chip (NoC) interconnect IP solutions, today announced that Ingenic Semiconductor Co., Ltd. has selected Arteris' Chip-to-Chip (C2C) interconnect solutions for Ingenic's mobile phone and tablet application processor systems-on-chip (SoCs). Ingenic chose Arteris interconnect IP to support the high speed inter-chip communication requirements in their next generation XBurst mobile SoC products.
Silicon-proven C2C IP from Arteris enables high bandwidth, low-latency inter-chip communication. This allows two chips, such as a mobile phone applications processor and a mobile phone modem, to share a single random access memory (RAM) chip. The round-trip latency of the inter-chip connection is fast enough for the modem baseband to share the application processor's RAM chip and to maintain enough read throughput and low latency for cache refills. This enables the phone manufacturer to remove the modem baseband's dedicated RAM chip from the phone's bill of materials (BOM), saving a minimum $2 in cost per phone.
In addition to the $2 cost savings, removing a RAM saves significant printed circuit board (PCB) space, creating more room for a larger battery or additional features.
"The Arteris interconnect IP helps us deliver a lower-cost solution to our customers while guaranteeing compatibility with industry-standard modem basebands," said Qiang Liu, Chairman and CEO at Ingenic. "In addition, Arteris' silicon-proven interconnect IP decreases our implementation and schedule risks."
"An increasing number of Chinese fabless application processor and modem vendors have licensed C2C to reduce the BOM cost and PCB area of TD-SCDMA/TD-LTE mobile phones and tablets. Ingenic's adoption of Arteris technology for its newest XBurst products is a strong endorsement of this standard," said K. Charles Janac, President and CEO of Arteris.
About Arteris
Arteris, Inc. provides Network-on-Chip interconnect IP and tools to accelerate System-on-Chip semiconductor (SoC) assembly for a wide range of applications. Results obtained by using the Arteris product line include lower power, higher performance, more efficient design reuse and faster development of ICs, SoCs and FPGAs.
Founded by networking experts, Arteris operates globally with headquarters in Sunnyvale, California and an engineering center in Paris, France. Arteris is a private company backed by a group of international investors including ARM Holdings, Crescendo Ventures, DoCoMo Capital, Qualcomm Incorporated, Synopsys, TVM Capital, and Ventech. More information can be found at www.arteris.com .
About Ingenic
Ingenic Semiconductor was founded in Beijing in 2005 to develop innovative processor technology. Based on the MIPS architecture, Ingenic designs its own CPU core called XBurst. The XBurst CPU adopts an innovative micro-architecture which consumes very little power under high performance. Powered by the XBurst CPU, the company's JZ47xx series application processors are widely deployed in embedded devices and consumer electronic products including PMPs, educational electronic devices, eBooks, biometrics and more, with more than 30 million units shipped to-date. For more information, visit http://www.ingenic.cn/ .
Related Semiconductor IP
- NoC System IP
- Non-Coherent Network-on-Chip (NOC)
- Coherent Network-on-Chip (NOC)
- High speed NoC (Network On-Chip) Interconnect IP
- Smart Network-on-Chip (NoC) IP
Related News
- Newly-Formed Japanese Joint Venture Licenses Arteris Chip-to-Chip (C2C) Interconnect IP
- Arteris and SiFive Deliver Pre-verified Solution for the Datacenter Market
- Arteris Revolutionizes Semiconductor Design with FlexGen – Smart Network-on-Chip IP Delivering Unprecedented Productivity Improvements and Quality of Results
- Cadence Advances AI in the Cloud with Industry-First DDR5 12.8Gbps MRDIMM Gen2 Memory IP System Solution
Latest News
- CAST Releases First Dual LZ4 and Snappy Lossless Data Compression IP Core
- Arteris Wins “AI Engineering Innovation Award” at the 2025 AI Breakthrough Awards
- SEMI Forecasts 69% Growth in Advanced Chipmaking Capacity Through 2028 Due to AI
- eMemory’s NeoFuse OTP Qualifies on TSMC’s N3P Process, Enabling Secure Memory for Advanced AI and HPC Chips
- AIREV and Tenstorrent Unite to Launch Advanced Agentic AI Stack