embedded world 2023: Codasip presents on custom compute and RISC-V design
February 16, 2023 -- Codasip, the leader in processor design automation and RISC-V processor IP, will present technical sessions on RISC-V together with partners Menta and Siemens at next month’s embedded world 2023.
Codasip will showcase its custom compute offering in hall 4, stand 4-565. Visitors will get to see how customizing a standard Codasip RISC-V core can bring significantly better performance and get hands-on experience of a dual-core lockstep implementation for safe and secure custom compute.
Codasip CTO Zdenek Prikryl will present several RISC-V topics during the conference, including custom instructions for powerful local AI. In a talk by CMO Rupert Baines, designers will learn about architecture optimization, hardware/software co-design, and domain-specific acceleration, as well as how to talk advantage of these techniques.
Codasip will share its expertise in the following sessions:
On Wednesday, 15th March, 2-2:30 pm, Rupert Baines, CMO, presents on Architecting your ambitions with custom compute in the Exhibitor’s forum, Hall 3A.
Thursday, 16th March, 11:30 am-12 pm, Zdenek Prikryl, CTO is presenting with Yoan Dupret, Managing Director and CTO of Menta, on Adding RISC-V Custom Instructions Post-Silicon Through eFPGA (session 10.3 / RISC-V Ecosystem).
Thursday, 16th March, at 2.45-3.15 pm Zdenek presents with Nicolae Tusinschi, Product Manager, Siemens, on A Multi-Layered Methodology to Address Challenges Linked to RISC-V Most Attractive Feature (session 10.4 / Design of RISC-V).
Also on Thursday, at 4.30-5 pm, Zdenek is presenting on Creating a Domain-Specific Core with RISC-V Custom Instructions for Powerful Local AI (session 10.5 / RISC-V AI Extensions).
Anyone interested to learn more about Codasip’s offering can request a meeting at codasip.com/events/embedded-world-2023/
The embedded world exhibition and conference is the world’s leading meeting place for the embedded community. Taking place in Nuremberg, Germany on March 14-16, the conference gathers leading experts, key players, and industry associations from the global embedded community. The conference is focused on the world of embedded systems, from components and modules to operating systems, hardware and software design, M2M communication, services, and various issues related to complex system design.
Don’t miss Codasip at #ew23.
Related Semiconductor IP
- RISC-V Vector Extension
- RISC-V Real-time Processor
- RISC-V High Performance Processor
- 32b/64b RISC-V 5-stage, scalar, in-order, Application Processor. Linux and multi-core capable. Maps upto ARM A-35. Optimal PPA.
- 32 Bit - Embedded RISC-V Processor Core
Related News
- Codasip L31 customizable RISC-V core is an Embedded World Best in Show
- Microchip's Low-Cost PolarFire® SoC Discovery Kit Makes RISC-V and FPGA Design More Accessible for a Wider Range of Embedded Engineers
- embedded world 2024: Codasip demonstrates CHERI memory protection
- Codasip unveils versatile automotive-grade embedded RISC-V core
Latest News
- PCI-SIG’s Al Yanes on PCIe 7.0, HPC, and the Future of Interconnects
- Ubitium Debuts First Universal RISC-V Processor to Enable AI at No Additional Cost, as It Raises $3.7M
- Cadence Unveils Arm-Based System Chiplet
- Frontgrade Gaisler Unveils GR716B, a New Standard in Space-Grade Microcontrollers
- Blueshift Memory launches BlueFive processor, accelerating computation by up to 50 times and saving up to 65% energy