Cadence CEO: Chip execs eye China, India
Kariyatil Krishnadas, EETimes
10/21/2011 6:18 PM EDT
BANGALORE, India—Chief executives of companies, including semiconductor companies, are in the process of asking themselves on how best to address the Chinese and Indian markets, as these markets are the ones that are on top of everyone's mind, according to Lip-Bu Tan, president and CEO of EDA vendor Cadence Design Systems Inc.
Speaking to executives here, Tan said this is because semiconductor consumption in the two countries is not only rising but set to rise even more.
To read the full article, click here
Related Semiconductor IP
- Simulation VIP for Ethernet UEC
- Bluetooth® Low Energy 6.2 PHY IP with Channel Sounding
- Simulation VIP for UALink
- General use, integer-N 4GHz Hybrid Phase Locked Loop on TSMC 28HPC
- JPEG XL Encoder
Related News
- ARM CEO Simon Segars Joins SoftBank Group Board of Directors
- SiFive Appoints Naveed Sherwani as CEO
- Everspin Appoints Semiconductor Storage Veteran Kevin Conley as CEO
- TSMC Dr. Morris Chang Announces Retirement in June 2018. Future Dual Leadership Will Be Mark Liu as Chairman And C.C. Wei as CEO.
Latest News
- Mixel MIPI IP Integrated into Automotive Radar Processors Supporting Safety-critical Applications
- GlobalFoundries and Navitas Semiconductor Partner to Accelerate U.S. GaN Technology and Manufacturing for AI Datacenters and Critical Power Applications
- VLSI EXPERT selects Innatera Spiking Neural Processors to build industry-led neuromorphic talent pool
- SkyWater Technology and Silicon Quantum Computing Team to Advance Hybrid Quantum-Classical Computing
- Dnotitia Revolutionizes AI Storage at SC25: New VDPU Accelerator Delivers Up to 9x Performance Boost