LPDDR2 DRAM IP Listing

LPDDR2 DFI Verification IP provides an smart way to verify the LPDDR2 DFI component of a SOC or a ASIC.

• Verification IP

DFI LPDDR2 Assertion IP provides an smart way to verify the ARM DFI LPDDR2 component of a SOC or a ASIC.

• Protocol Bridge

Synopsys offers a system-level memory interface IP portfolio for SoCs requiring an interface to one or a range of high-performanc…

• DDR
• Available on request
• Available

Synopsys offers a system-level memory interface IP portfolio for SoCs requiring an interface to one or a range of high-performanc…

• DDR
• Available on request
• Available

The DDR4 multiPHY is a mixed-signal IP solution designed to provide LPDDR3/LPDDR2/DDR3/DDR3U/DDR3L/DDR4 SDRAM connectivity in a S…

• Single-Protocol PHY
• Silicon Proven
• Immediate

Brite provides a DDR subsystem including not only controller, PHY and IO, but also corresponding tuning and configuration softwar…

• Single-Protocol PHY