I2C Controller IP Listing

I2C Dual mode IP ( master and slave mode) with APB interface to support the standard I2C Bus Protocol and APB5 Interface on the A…

• I2C / I3C
• NOW

I²C (Inter-Integrated Circuit) Controller is a two-wire, bi-directional serial bus that provides simple and efficient method of d…

• I2C / I3C
• Now

The DB-I2C-S-Hs-Mode I2C Slave Controller IP Core interfaces user Registers to an I2C Bus or Memory (SDRAM / SRAM / Flash / FIFO)…

• I2C / I3C
• Successful in Customer Implementations
• Immediately
• Philips/NXP – The I2C-Bus S…

The DB-I2C-M-Hs-Mode Controller IP Core interfaces a microprocessor via the AMBA AXI / AHB / APB Bus or Avalon Bus to an I2C Bus …

• I2C / I3C
• Successful in Customer Implementations
• Immediately
• Philips/NXP – The I2C-Bus S…

The DB-I2C-MS-Hs-Mode Controller IP Core interfaces a microprocessor via the AMBA AXI / AHB / APB Bus or Avalon Bus to an I2C Bus…

• I2C / I3C
• Successful in Customer Implementations
• Immediately
• Philips I2C Specification 2…

The DB-I2C-M-AXI Controller IP Core interfaces an ARM, MIPS, PowerPC, ARC or other high performance microprocessor via the AMBA 2…

• I2C / I3C
• Successful in Customer Implementations
• Immediately
• AMBA 2.0; Philips I2C Speci…

The DB-I2C-M-AHB Controller IP Core interfaces an ARM, MIPS, PowerPC, ARC or other high performance microprocessor via the AMBA 2…

• I2C / I3C
• Successful in Customer Implementations
• Immediately
• AMBA 2.0; Philips I2C Speci…

The Digital Blocks DB-I2C-MS-APB Controller IP Core interfaces a microprocessor via the AMBA APB Bus to an I2C Bus in Standard-Mo…

• I2C / I3C
• Successful in Customer Implementations
• Immediately
• Philips I2C Specification 2…

The DB-I2C-MS-AHB Controller IP Core interfaces a microprocessor via the AMBA AHB Bus to an I2C Bus in Standard-Mode (100 Kbit/s)…

• I2C / I3C
• Successful in Customer Implementations
• Immediately
• Philips I2C Specification 2…

The DB-I2C-MS-AXI Controller IP Core interfaces a microprocessor via the AMBA AXI Bus to an I2C Bus in Standard-Mode (100 Kbit/s)…

• I2C / I3C
• Successful in Customer Implementations
• Immediately
• Philips I2C Specification 2…

The DB-I2C-M-APB Controller IP Core interfaces an ARM, MIPS, PowerPC, ARC or other high performance microprocessor via the AMBA 2…

• I2C / I3C
• Successful in Customer Implementations
• Immediately
• AMBA 2.0; Philips I2C Speci…

The I2C Controller provides access to devices with I2C interface.

• I2C / I3C
• Soft Core
• Now
• I2C 2.1

The DB-I2C-S-AHB Controller IP Core interfaces a NIOS II, ARM, MIPS, PowerPC, ARC or other high-performance microprocessor via th…

• I2C / I3C

The DB-I2C-M-AVLN Controller IP Core interfaces a microprocessor via the Avalon Bus to an I2C Bus.

• I2C / I3C

The DB-I2C-MS-AVLN Controller IP Core interfaces a microprocessor via the Avalon Bus to an I2C Bus in Standard-Mode (100 Kbit/s) …

• I2C / I3C

The DB-I2C-S-AHB-BRIDGE is an I2C Slave Controller IP Core focused on low VLSI footprint ASIC / ASSP designs not requiring intern…

• I2C / I3C
• Successful in Customer Implementations
• Immediately
• NXP Rev 7.0 October 1, 2021

The DB-I2C-S-AXI-BRIDGE is an I2C Slave Controller IP Core focused on low VLSI footprint ASIC / ASSP designs not requiring intern…

• I2C / I3C
• Successful in Customer Implementations
• Immediately
• NXP Rev 7.0 October 1, 2021

The DB-I2C-S-APB-BRIDGE is an I2C Slave Controller IP Core focused on low VLSI footprint ASIC / ASSP designs not requiring intern…

• I2C / I3C
• Successful in Customer Implementations
• Immediately
• NXP Rev 7.0 October 1, 2021

The DB-I2C-S-AHB Controller IP Core interfaces an ARM, MIPS, PowerPC, ARC or other high-performance microprocessor via the AMBA 2…

• I2C / I3C
• Successful in Customer Implementations
• Immediately
• Philips I2C Specification 2…

The DB-I2C-S-APB Controller IP Core interfaces an ARM, MIPS, PowerPC, ARC or other high performance microprocessor via the AMBA 2…

• I2C / I3C
• Successful in Customer Implementations
• Immediately
• NXP Rev 7.0 October 1, 2021