SG DMA Controller, 1-16 DMA Channels, AXI4 / AXI3 Master Interfaces
The DB-DMAC-MC-AXI Verilog RTL IP Core is a Multi-Channel DMA Controller supporting 1 – 16 independent data transfers.
SG DMA Controller, 1-16 DMA Channels, AHB5 Master Interface
The DB-DMAC-MC-AHB5 & DB-DMAC-MC-AHB-Lite Verilog RTL IP Core is a Multi-Channel DMA Controller supporting 1 – 16 independent dat…
AXI4-Stream to/from AXI Memory Map – 2 DMA Channels - Control by SGL Commands Streams
The DB-DMAC-MC2-CS-MM2S-S2MM Verilog RTL IP Core is a Multi-Channel Scatter-Gather DMA Controller that transfers data between AXI…
AXI4-Stream to/from AXI Memory Map – 2 DMA Channels - Control by SGL Descriptors
The DB-DMAC-MC2-DL-MM2S-S2MM Verilog RTL IP Core is a Multi-Channel Scatter-Gather DMA Controller that transfers data between AXI…
The RapidlO-AXI Bridge (RIO-AXI Bridge) is a flexible and configurable IP used along with the native RapidlO Controller (GRIO) to…
PCIe DMA Controller (Low Latency)
The RapidDMA IP solution offers a fully integrated, -configurable, multi-channel and low latency PCIe-DMA solution.