The PCIe-NVMe SSD controller platform is compliant with NVM Express 1.2 specification and targets for both enterprise and client …
- NVMe Controller
- Silicon Proven
- available, Customization/Design Service is also available
- NVM Express®, Pass UNH-IOL …
The PCIe-NVMe SSD controller platform is compliant with NVM Express 1.2 specification and targets for both enterprise and client …
The D/AVE HD 2.5D GPU family is an evolution of the D/AVE 2D family supporting high quality 2D and 3D rendering for displays up t…
OpenGL ES 2.0 3D graphics IP core for FPGAs and ASICs
D/AVE NX is the latest and most addition to the D/AVE family of rendering cores.
The UCIe-S 64GT/s PHY IP is a cutting-edge solution designed to meet the growing demand for ultra-high-speed interconnects betwee…
The UCIe-A 64GT/s PHY IP is a cutting-edge solution designed to meet the growing demand for ultra-high-speed interconnects betwee…
This IP reference platform has been architected with ISO26262 applications and the fast integration of customer IP in mind from t…
The J5 is a core cell design of an application specific signal processor which performs both Trusurround(TM) and SRS® 3-D audio v…
Synopsys 3DIO IP Solution is a specialized IO for multi-die integration.
TSMC N3P Source Sync 3DIO Library
Synopsys 3DIO IP Solution is a specialized IO for multi-die integration.
Synopsys 3DIO IP Solution is a specialized IO for multi-die integration.
TSMC N5 Source Sync 3DIO Library
Synopsys 3DIO IP Solution is a specialized IO for multi-die integration.
Synopsys 3DIO IP Solution is a specialized IO for multi-die integration.
Synopsys 3DIO IP Solution is a specialized IO for multi-die integration.
The Bitec HDMI 2.0b IP Core enables HDMI interconnectivity without the need for external HDMI ASSP devices.
OpenGL® ES2.0 compatible 3D graphics IP core
The world’s smallest-class OpenGL® ES2.0 compatible 3D graphics IP core.
3D Resistive RAM - High-Density Memory
CrossBar Resistive RAM (ReRAM) High-Density Memory IP cores are an ideal choice for high-density, low-latency memory applications…
The BLE 4.2 SoC White Box IP solution is the design data base of a fully compliant BLE 4.2 production chip with SW and profiles i…
As a part of the Video and Vision Processing (VVP) Suite Intel® FPGA IP, the 3D look-up table (LUT) Intel® FPGA IP provides an ef…
Stereo 3D depth value Correspondenc calculation with 64 disparities
iv-corr implements a 1-dimensional search algorithm for stereo correspondences in stereo pictures.
Camera Combo Receiver - 5.0Gbps 8-Lane - TSMC 12FFC, 7FF
The CL12842M8RM3AM5AIP5000 is an ideal means to link Camera Modules or CMOS Image Sensor (CIS) to ISP (Imaging Signal Processor) …