The Catastrophic Trip Sensor has been specifically designed to protect against thermal runaway and comprises a central hub and a …
- Temperature Sensor
- Available on Request
- Available
The Catastrophic Trip Sensor has been specifically designed to protect against thermal runaway and comprises a central hub and a …
Thermal Diode with Base Pin, TSMC N3
Thermal diodes provide a useful means for monitoring junction temperature on die and are typically independently powered from the…
Distributed Thermal Sensor (DTS) Non-Deep NWELL, TSMC N3
The granular DTS offers a significant area reduction in comparison to some standard in-chip thermal sensor solutions and supports…
Distributed Thermal Sensor (DTS) Deep NWELL, TSMC N3
The granular DTS offers a significant area reduction in comparison to some standard in-chip thermal sensor solutions and supports…
In-Chip Monitoring Subsystem for Process, Voltage & Temperature (PVT) Monitoring, TSMC N3
A full suite of embedded monitoring IP managed by a PVT controller with standard interfaces, creates a subsystem dedicated to max…
Temperature Sensor Non-Deep NWELL, TSMC N3
A high precision low power junction temperature sensor that has been developed to be easily embedded into digital ASIC designs.
Temperature Sensor Deep NWELL, TSMC N3
A high precision low power junction temperature sensor that has been developed to be easily embedded into digital ASIC designs.
Voltage Monitor with Digital Output (Multi-domain supply monitoring), TSMC N3
The voltage monitor is a low power self-contained IP block specially designed to monitor voltage levels within the core logic vol…
Process Detector (For DVFS and monitoring process variation), TSMC N3
An embedded process detector circuit which helps Integrated Circuit (IC) developers to address the problem of process variability…
MIPI C-PHY v2.0 D-PHY v2.1 RX 3 trios/4 Lanes in TSMC (N5, N3)
Synopsys’ integrated C-PHY/D-PHY IP enables high-performance, low-power interface to SoCs, application processors, baseband proce…
UCIe-A PHY for Advanced Package (x64) in TSMC (N7, N6, N5, N3)
Synopsys UCIe PHY IP enables high-bandwidth, low-power and low-latency die-to-die connectivity in a package for hyperscale data c…
UCIe-S PHY for Standard Package (x16) in TSMC (N7, N6, N4P, N5, N3)
Synopsys UCIe PHY IP enables high-bandwidth, low-power and low-latency die-to-die connectivity in a package for hyperscale data c…
LDO Voltage Regulator, 250 mA, TSMC N3P
LDO Voltage Regulator, 250 mA, Adjustable 0.45 V to 0.9 V Output The LDO IP is a 1.2V low-quiescent-current adjustable output vol…
LDO Voltage Regulator, Adjustable 0.45 V to 0.9 V Output, 30 mA, TSMC N3P
LDO Voltage Regulator, 30 mA, Adjustable 0.45 V to 0.9 V Output The LDO IP is a 1.2V low-quiescent-current adjustable output volt…
Standard Cell Library, Low Voltage Operation 0.45 V TSMC N3P
The low voltage Standard Cell Library for the TSMC N3P process represents a breakthrough in power efficiency for high performance…
Ultra High-Speed Cache Memory Compiler - 2-Port Register File - TSMC N3P
The Ultra High-Speed cache memory is an adaptable, independent, non-coherent cache Intellectual Property (IP) featuring an cache …
Bandgap Voltage Reference, 0.45 V Output, Low PPM/°C, TSMC N3P
Bandgap Voltage Reference, 0.45 V Output The Bandgap Voltage Reference IP is a 1.0 V input, low PPM/°C, 0.45 V reference voltage …
ONFI IO v6.0, 4.8GT/s, TSMC N3P, 1.2V, N/S orientation, H&V cell
ONFI I/O is a non-volatile memory interface technology with high bandwidth capabilities, mainly developed for flash storage appli…
eUSB2 v1.1 Dual-Role, repeater/native mode PHY, TSMC N3E, 1.2V, N/S orientation
Embedded USB2 (eUSB2) is a new generation specification proposed by USB Association that extends USB 2.0 specification and uses 1…
eUSB2 v1.2 Dual-Role, repeater/native mode PHY, TSMC N3P, 1.2V, N/S orientation
Embedded USB2 (eUSB2) is a new generation specification proposed by USB Association that extends USB 2.0 specification and uses 1…