Standard Cell (High Voltage) Library IP, 9 tracks, UMC 0.162um eHV process
UMC 0.162um eHV 3.3V/8.25V/16.5V process Standard Cell Library.
- Standard Cell Libraries
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
Standard Cell (High Voltage) Library IP, 9 tracks, UMC 0.162um eHV process
UMC 0.162um eHV 3.3V/8.25V/16.5V process Standard Cell Library.
Standard Cell (High Voltage) Library IP, 9 tracks, UMC 0.135um eHV process
UMC 0.135um Embedded High Voltage 1.5V Core Cell Library.
Standard Cell (Generic) Library IP, 9 tracks, UMC 0.162um eFlash process
UMC 0.162um eFlash process Generic Cell Library.
General Purpose IO IP, UMC 0.153um LL process
UMC 0.153um 3.3V IO Mixed-Mode/Logic process True 3.3V IO Cell Library (blown up version of 0.18um IO ).
General Purpose IO IP, 5V tolerance, UMC 0.153um LL process
UMC 0.153um Mixed-Mode/Logic 3.3V IO Logic process 5V Tolerant Standard IO Cell Library (blown up version of 0.18um IO).
MIPI Controller IP, CSI-2 Transmitter, High-Speed 80Mbps to 1.5Gbps per data lane, Soft IP
MIPI Transmitter Controller.
MIPI Controller IP, DSI Peripheral, Soft IP
MIPI DSI Peripheral Controller.
MIPI Controller IP, DSI Host, Soft IP
DSI Host Controller.
MIPI Controller IP, CSI-2 Receiver, High-Speed 80Mbps to 1.5Gbps per data lane, Soft IP
MIPI CSI Receiver Controller.
Watchdog IP, 66MHz APB clock rate, 32 - bit down counter, Soft IP
WatchDog timer with APB interface.
Band Gap IP, Input: 1.8V - 3.6V, VBG=0.615V, UMC 0.162um eHV process
Input 1.8V-3.6V, VBG=0.615V, Band Gap, UMC 0.162um HV-DDD process.
Band Gap IP, Input: 1.2V - 1.98V, VBG=0.615V, UMC 0.153um Logic process
Input 1.2V-1.98V, VBG=0.615V bandgap, UMC 0.153um Logic process.
Linear Regulator IP, Output: 1.8V/120mA, UMC 0.153um Logic process
3.3V to 1.8V with 120mA driving capability, VBG=0.615V, Linear Regulator, UMC 0.153um Logic process.
Power on Reset IP, UMC 0.162um eHV process
Power on reset(POR) block, UMC 0.162um eHV process.
Power on Reset IP, Input: 1.8V, UMC 0.153um MS process
Vrr=1.2V Vfr=1.0V, input 1.8V, Core type (with Self-Test Circuit), Power On Reset, UMC 0.153um Mixed-Mode/Logic process.
RC Oscillator IP, Output: 50MHz, UMC 0.162um eHV process
Internal-RC, frequency 50MHz.
RC Oscillator IP, Output: 10MHz, UMC 0.162um G2 process
Internal-RC, frequency 10MHz.
D/A Converter IP, 10 bits, 1MHz, UMC 0.153um Logic process
10-Bit 1MHz Voltage Output R-2R Digital-to-Analog converter, UMC 0.153um Logic process.
A/D Converter IP, 24 bits, 96KHz, 3-channel, HJTC 0.18um eFlash/G2 process
24-Bit 96KHz Analog-to-Digital converter, 3.3V 3-channel Sigma-Delta Audio Analog-to-Digital converter, HJ 0.18um eFlash process.
DDR IO Brite DDR (Double Data Rate SDRAM) IO libraries cover wide range of DDR standards, from DDR2 to DDR4 and LPDDR2 to LPDDR4X…