A/D Converter IP, 10 bits, 45Msps, UMC 40nm LP process
1.1V/3.3V 10-Bit 45MSPS Pipelined Analog-to-Digital converter, UMC 40nm LP/RVT Low-K Logic process.
- 10 Bit
- UMC
- 40nm
- LP
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
A/D Converter IP, 10 bits, 45Msps, UMC 40nm LP process
1.1V/3.3V 10-Bit 45MSPS Pipelined Analog-to-Digital converter, UMC 40nm LP/RVT Low-K Logic process.
A/D Converter IP, 8 bits, 70Ksps, UMC 55nm SP process
8-Bit 70KSPS SAR Analog-to-Digital converter, UMC 55nm SP/RVT Low-K Logic process.
A/D Converter IP, 6 bits, 44Msps, UMC 0.25um MS process
6-Bit 44MSPS Differential Analog-to-Digital converter, UMC 0.25um Mixed-Mode process.
A/D Converter IP, 6 bits, 44Msps, UMC 0.18um Mixed-Mode process
6-Bit 44MSPS Differential Analog-to-Digital converter, UMC 0.18um Logic/Mixed-Mode process.
A/D Converter IP, 10 bits, 50Msps, UMC 40nm LP process
10-Bit 50MSPS SAR Analog-to-Digital converter, UMC 40nm LP/ Low-K LVT process.
A/D Converter IP, 10 bits, 2Msps, with 2-to-1 input MUX, UMC 55nm SP process
10-Bit 2MSPS SAR Analog-to-Digital converter with 2-to-1 Mux in, UMC 55nm SP/RVT process.
A/D Converter IP, 10 bits, 1Msps, UMC 0.18um G2 process
10-Bit 1MSPS single-end Analog-to-Digital converter, UMC 0.18um GII Logic process.
A/D Converter IP, 10 bits, 167Ksps, UMC 55nm SP process
A 1.8V, 10-Bit 167KSPS 8-to-1 Low Power SAR Analog-to-Digital converter with internal temperature sensor, UMC 55nm SP/RVT Logic p…
Most modern systems use high-speed, AC-coupled deferential pairs.
Transition cells for 40nmLL IO libraries
IP
Standard digital, analog and oscillator IO
IP
Standard digital, analog and oscillator IO
IP
Single power supply 1.5V 16KB EEPROM
16KB EEPROM, single power supply 1.5V
Programmable 8 level pull-up/down resistor
IP
Programmable 4 level pull-up/down resistor
IP
Output Voltage Regulator: 1.1V, Input Voltage:2.97V ~ 3.63V
Output Voltage:1.1V, Input Voltage:2.97V ~ 3.63V, Output Loading:100mA.
Output Voltage Regulator: 1.1V, Input Voltage:2.4V ~ 3.63V
Output Voltage:1.1V, Input Voltage:2.4V ~ 3.63V, Output Loading:100mA.
Low-cap high-speed RF analog IO
IP
IP
LDO for 40nm eFuse 3.3V application(LDO + eFuse)
LDO for 40nm eFuse 3.3V application(LDO + eFuse)