Input 2M-200M Hz, output 12M-300MHz, frequency synthesizable PLL; UMC 0.13um CMOS image sensor process
- UMC
- 130nm
- HS
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
Input 2M-200M Hz, output 12M-300MHz, frequency synthesizable PLL; UMC 0.13um CMOS image sensor process
Input 1M-200M Hz, output 12M-300MHz, frequency synthesizable PLL; UMC 0.13um CMOS image sensor process
Internal-RC, trimmable fixed frequency 80MHz.
Internal-RC and Built-in Bandgap, trimmable fixed frequency 12MHz.
Output frequency 32KHz. Input 0.9V-1.1V; UMC 55nm SP/RVT LowK Logic Process
Output frequency 32KHz.
Internal RC, output 40MHz with +/-5% frequency accuracy OSC, UMC 55nm SP/RVT Low-K logic Process
Internal RC, output 40MHz with +/-5% frequency accuracy OSC, UMC 55nm SP/RVT Low-K logic Process
internal-R, frequency 32.768MHz RC OSC. Input 0.9V±10% or 1.2V±10% ; UMC 55 nm EFLASH process
internal-R, frequency 32.768MHz RC OSC.
Internal-RC, frequency 8MHz. Input 1.08V-1.32V ; UMC 55nm LP/RVT LowK Logic Process
Internal-RC, frequency 8MHz.
XTAL LESS for USB3.0 ; UMC 40nm LP/RVT Logic Process
XTAL LESS for USB3.0 ; UMC 40nm LP/RVT Logic Process
Input 5M-35M Hz, output 5M-35M Hz, timing generator DLL; UMC 90nm SP process
Input 5M-35M Hz, output 5M-35M Hz, timing generator DLL; UMC 90nm SP process
1.2V 50-202.5MHz DLL with programable phase delay; UMC 0.11um HS/AE (AL Enhancement) Logic Process
1.2V 50-202.5MHz DLL with programable phase delay; UMC 0.11um HS/AE (AL Enhancement) Logic Process
Input 25~66MHz, output 200~800MHz wide range SSCG PLL, UMC 28nm HPC/RVT process.
Input 25~66MHz, output 200~800MHz wide range SSCG PLL, UMC 28nm HPC/RVT process.
10G TCP+UDP Offload+EMAC+PCIe+Host IF Ultra-Low Latency (SXTOE+UOE+PCIe)
INT 25012 is the only SOC IP Core that implements a full 10G bit TCP and UDP Stack in Handcrafted, Ultra-High Performance, , Flex…
10G TCP+UDP Offload+EMAC+Host_IF Ultra-Low Latency (SXTOE+UOE)
INT 25011 is the only SOC IP Core that implements a full 10G bit UDP Stack in Handcrafted, Ultra-High Performance, , Flexible and…
1G TCP Offload Engine TOE+MAC+PCIe+Host_IF Ultra-Low Latency (STOE+PCIe)
INT 2012 is the only SOC IP Core that implements a full 1G bit TCP Stack in Handcrafted, Ultra Low Latency and Very High Performa…
1G TCP Offload Engine TOE+MAC+Host_IF Ultra-Low Latency (STOE)
INT 1011 is the only SOC IP Core that implements a full 1G bit TCP Stack in Handcrafted, Ultra Low Latency and Very High Performa…
1G UDP Offload+MAC+PCIe+Host_IF Ultra-Low Latency (SUOE+PCIe)
INT 1512 is the only SOC IP Core that implements a full 1G bit UDP Stack in Handcrafted, Ultra High Performance, , Flexible and S…
1G_UDP_Offload+MAC+Host_IF Ultra-Low Latency (SUOE)
INT 1511 is the only SOC IP Core that implements a full 1G bit UDP Stack in Handcrafted, Ultra High Performance, , Flexible and S…
CSMC 0.18um Clock Gating Cell Library, 1.8v operating voltage
CSMC 0.18um Clock Gating Cell
CSMC 0.18um Standard Cell Library, 1.8v operating voltage
CSMC 0.18um Standard Cell Library