55nm eFlash Dual-Port SRAM memory compiler with row redundancy
55nm eFlash Dual-Port SRAM memory compiler with row redundancy
- UMC
- 55nm
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
55nm eFlash Dual-Port SRAM memory compiler with row redundancy
55nm eFlash Dual-Port SRAM memory compiler with row redundancy
UMC 55nm eFlash eFlash Dual-Port SRAM Memory Compiler
UMC 55nm eFlash eFlash Dual-Port SRAM Memory Compiler
UMC 55nm EFLASH Process Two Port Register File
UMC 55nm EFLASH Process Two Port Register File
UMC 55nm eFlash peocess One Port Register File memory compiler_x005F_x000D_
UMC 55nm eFlash peocess One Port Register File memory compiler
UMC 55nm eFlash Process Dual-Port SRAM with Row redundancy
UMC 55nm eFlash Process Dual-Port SRAM with Row redundancy
UMC 55nm EFLASH Process Dual-Port SRAM Memory Compiler
UMC 55nm EFLASH Process Dual-Port SRAM Memory Compiler
UMC 55nm EFLASH Processy Single-Port SRAM with row repair Memory complier
UMC 55nm EFLASH Processy Single-Port SRAM with row repair Memory complier
UMC 55nm eFlash Single-Port SRAM memory compiler
UMC 55nm eFlash Single-Port SRAM memory compiler
55 SP Dual Port SRAM compiler with 1P4M metal option
55 SP Dual Port SRAM compiler with 1P4M metal option
UMC 65nm SP LowK Logic Process synchronous single port register file SRAM memory compiler.
UMC 65nm SP LowK Logic Process synchronous single port register file SRAM memory compiler.
UMC 90nm SPLVT ultra-high speed 1-port SRAM
UMC 90nm SPLVT ultra-high speed 1-port SRAM
UMC 0.13um Al Standard performance process standard synchronous high density dual port SRAM compiler
UMC 0.13um Al Standard performance process standard synchronous high density dual port SRAM compiler
UMC 0.18UM Mixed Mode/RF; Two Port Register File
UMC 0.18UM Mixed Mode/RF; Two Port Register File
UMC 0.18UM Mixed Mode/RF; One Port Register File Memory Compiler
UMC 0.18UM Mixed Mode/RF; One Port Register File Memory Compiler
UMC 0.11um AL/LL Logic Process miniLib standard cell library
UMC 0.11um AL/LL Logic Process miniLib standard cell library
UMC 0.11um CIS Process cell library
UMC 0.11um CIS Process cell library
UMC 65nm LL Lowk Logic Process 1.8V I2C IO for Sony
UMC 65nm LL Lowk Logic Process 1.8V I2C IO for Sony
UMC 55nm LP/RVT Logic Process MPCA cell library_x005F_x000D_
UMC 55nm LP/RVT Logic Process MPCA cell library
UMC 55nm LP/LVT Logic Process MPCA cell library_x005F_x000D_ _x005F_x000D_
UMC 55nm LP/LVT Logic Process MPCA cell library
USB 2.0 On-The-Go PHY; UMC 28nm HLP Process
USB 2.0 On-The-Go PHY; UMC 28nm HLP Process