UMC 40nm LP Logic Process Single Port SRAM Memory Compiler using 213 bit-cell with Peri-LVT
UMC 40nm LP Logic Process Single Port SRAM Memory Compiler using 213 bit-cell with Peri-LVT
- UMC
- 40nm
- LP
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
UMC 40nm LP Logic Process Single Port SRAM Memory Compiler using 213 bit-cell with Peri-LVT
UMC 40nm LP Logic Process Single Port SRAM Memory Compiler using 213 bit-cell with Peri-LVT
UMC 40nm LP Logic Process Single Port SRAM memory compiler using 213 bit -cell with peri-HVT
UMC 40nm LP Logic Process Single Port SRAM memory compiler using 213 bit -cell with peri-HVT
UMC 40nm Low Power Process SP-SRAM with 213 bit cell
UMC 40nm Low Power Process SP-SRAM with 213 bit cell
UMC 28nm HPC Process Ultra High Speed Single-Port SRAM Memory Compiler
UMC 28nm HPC Process Ultra High Speed Single-Port SRAM Memory Compiler
UMC 28nm HPC Process Ultra High Speed Single-Port SRAM memory compiler
UMC 28nm HPC Process Ultra High Speed Single-Port SRAM memory compiler
28nm HPM SH with Row redundancy
28nm HPM SH with Row redundancy
28nm HPM SP-SRAM with peri LVT row repair
28nm HPM SP-SRAM with peri LVT row repair
28nm HPM SP-SRAM with peri LVT
28nm HPM SP-SRAM with peri LVT
UMC 28nm HPM process standard synchronous high density single port SRAM memory compiler
UMC 28nm HPM process standard synchronous high density single port SRAM memory compiler
UMC 28nm HPC process standard synchronous high density single port low power SRAM memory compiler with row redundancy
UMC 28nm HPC Logic Process PG Single Port SRAM with LVT memory compiler
UMC 28nm HPC Logic Process PG Single Port SRAM with LVT memory compiler
UMC 28nm HPC Logic Process PG Single-Port SRAM with HVT memory compiler
UMC 28nm HPC Logic Process PG Single-Port SRAM with HVT memory compiler
UMC 28nm HPC Logic Process PG Single Port SRAM memory compiler
UMC 28nm HPC Logic Process PG Single Port SRAM memory compiler
UMC 28nm Logic process standard synchronous RVT periphery high density single port SRAM memory compiler with row redundancy.
UMC 28nm Logic process standard synchronous LVT periphery high density single port SRAM memory compiler.
UMC 28nm Logic process standard synchronous LVT periphery high density single port SRAM memory compiler.
UMC 28nm Logic process standard synchronous RVT periphery high density single port SRAM memory compiler.
UMC 90nm Standard Performance LowK Logic Process Synchronous high density single port register file SRAM memory compiler
UMC 40nm embedded high voltage (eHV) low power Process standard synchronous high density single port register file SRAM memory co…
UMC 40nm low power process standard synchronous one port register file SRAM memory compiler with LVT peripheral.