32G Multi Rate SerDes PHY - GlobalFoundries 22FDX
Extoll’s SerDes architecture is based on digital design elements and methodologies.
- GlobalFoundries
- 22nm
- FDX
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
32G Multi Rate SerDes PHY - GlobalFoundries 22FDX
Extoll’s SerDes architecture is based on digital design elements and methodologies.
500-1750MHz LNA with 1dB NF and 19dB gain
055TSMC_LNA_01 is an electronic amplifier intended to amplify a very low power signal without significantly degrading its SNR.
16-bit, 160MSPS ADC - GF 22 nm
The A16B160M is an ultra low-power, high-performance analog to digital converter (ADC) intellectual property (IP) design block.
10-bit, 500 MSPS SAR ADC - STMicroelectronics 28nm
The A10B500M is an ultra-low-power and high-speed analog to digital converter (ADC) intellectual property (IP) design block.
The A10B320M is an ultra-low-power and high-speed analog to digital converter (ADC) intellectual property (IP) design block.
10-bit, 2 GSPS SAR ADC - ST 28 nm
The A10B2G is a ultra low-power, high- speed analog to digital converter (ADC) intellectual property (IP) design block.
9-bit, 1 GSPS SAR ADC - STMicroelectronics 28nm
The A9B1G is an ultra low-power, high- performance analog to digital converter (ADC) intellectual property (IP) design block.
8-bit, 620 MSPS SAR ADC - STMicroelectronics 28nm
The A8B620M is an ultra-low-power and high-speed analog to digital converter (ADC) intellectual property (IP) design block.
8-bit, 40 GSPS SAR ADC - STMicroelectronics 28nm
The A8B40G is a low-power, high-speed analog to digital converter (ADC) intellectual property (IP) design block.
6-bit, 20 GSPS Flash ADC - STMicroelectronics 28nm
The A6B20G is a low-power, high-speed analog to digital converter (ADC) intellectual property (IP) design block.
The A6B10G is a low-power, high-speed analog to digital converter (ADC) intellectual property (IP) design block.
6-bit, 5 GSPS Flash ADC - STMicroelectronics 28nm
The A6B5G is a low-power, high-speed analog to digital converter (ADC) intellectual property (IP) design block.
4-bit, 20 GSPS Flash ADC - STMicroelectronics 28nm
The A4B20G is a low-power, high-speed analog to digital converter (ADC) intellectual property (IP) design block.
4-bit, 10 GSPS Flash ADC - STMicroelectronics 28nm
The A4B10G is a low-power, high-speed analog to digital converter (ADC) intellectual property (IP) design block.
Wideband LNA with a gain adjustment range from -22 to 20dB
180TSMC_LNA_14 is a IP block which includes a low-noise amplifier (LNA), gain control system and supply voltage controller.
Combined Power-On-Reset and Brown-Out-Reset in TSMC 22ULL
Combined Power-On-Reset and Brown-Out-Reset in TSMC 22ULL
The eSi-POLY1305 core is an easy to use POLY1305 accelerator peripheral that is fully compliant with the RFC7539 IETF standard.
Multi-PHY Receiver Link Controller
CD12842M8LRM3BM4AIP312P5 is a link IP that allows you to link a camera module or CMOS image sensor (CIS) to a host system.
MIPI D-PHY TX/CSI2 Link Controller
CD12631S4TIP is a link IP that allows you to link a camera module or CMOS image sensor (CIS) to a host system.
The eSi-CHACHA20 core is an easy to use CHACHA20 stream cipher hardware accelerator that is compliant with the IETF RFC7539 stand…