Codec IP Listing

The Ultra High Resolution JPEG 2000 Encoder & Decoder familly of IP cores goes beyond the resolution limit for processed images (…

• JPEG 2000

This analog-to-digital converter uses Successive Approximation Register (SAR) architecture to achieve 12-bit resolution.

• 12 Bit
• IBM
• 65nm
• LPe

This analog-to-digital converter uses Successive Approximation Register (SAR) architecture to achieve 12-bit resolution.

• 12 Bit
• SMIC
• 65nm
• LL
• Available on request

24-Bit 96KHz Audio Codec, UMC 90nm SP/RVT Logic 2.5OD3.3 Low-K process.

• UMC
• 90nm
• SP

24-Bit 96KHz Audio Codec, UMC 90nm SP/RVT 2.5OD3.3V Low-K Logic process.

• UMC
• 90nm
• SP

24-Bit 96KHz A/D onverter, 24-Bit 96KHz Digital-to-Analog converter, Audio Codec, UMC 90nm SP/RVT+HVT 2.5OD3.3 Logic process.

• UMC
• 90nm
• SP

24-Bit 96KHz A/D onverter, 24-Bit 96KHz Digital-to-Analog converter, Audio Codec, UMC 90nm SP/RVT Logic 2.5OD3.3 process.

• UMC
• 90nm
• SP

24-Bit 96KHz Sampled Mono Audio CODEC with Speaker Driver, UMC 0.153um Logic/Mixed-Mode process.

• Audio Codec

24-Bit 96KHz Sampled Mono Audio CODEC with Speaker Driver, UMC 0.153um Logic/Mixed-Mode process.

• Audio Codec

24-Bit 96KHz Sampled Mono Audio CODEC with Speaker Driver & Microphone bias, UMC 0.153um Logic/Mixed-Mode process.

• Audio Codec

24-Bit 96KHz Sampled Mono Audio CODEC with Class-D Speaker Driver, UMC 0.13um LL/FSG Logic process.

• UMC
• 130nm
• LL

24-Bit 96KHz Sampled Mono Audio CODEC with Speaker Driver, UMC 0.13um LL/FSG Logic process.

• UMC
• 130nm
• LL

24-Bit 96KHz Sampled Mono ADC and Stereo DAC Audio CODEC with Headphone Driver, UMC 0.11um HS Logic process.

• UMC
• 110nm
• HS

24-Bit 96KHz Sampled Mono ADC and Stereo DAC Audio CODEC with Headphone Driver, UMC 0.11um HS/AE (AL Enhancement) Logic process.

• UMC
• 110nm
• HS

24-Bit 96KHz Sampled Mono ADC and Stereo DAC Audio CODEC with Headphone Driver, UMC 0.11um HS/AE Logic process.

• UMC
• 110nm
• HS

This analog-to-digital converter (ADC) uses successive approximation register (SAR) architecture to achieve 12-bit resolution.

• 12 Bit
• IBM
• 65nm
• LPe

This analog-to-digital converter uses Successive Approximation Register (SAR) architecture to achieve 12-bit resolution.

• 12 Bit
• IBM
• 65nm
• LPe

This analog-to-digital converter uses Successive Approximation Register (SAR) architecture to achieve 12-bit resolution.

• 12 Bit

This analog-to-digital converter (ADC) uses successive approximation register (SAR) architecture to achieve 12-bit resolution.

• 12 Bit
• SMIC
• 180nm
• G

This analog-to-digital converter (ADC) is a one-channel SAR ADC with multi-input PGA and bandgap.

• 12 Bit
• SMIC
• 180nm
• G