Single precision fixed-size streaming floating-point FFT
This FFT circuit employs unique architectural characteristics providing functionality and capabilities not possible with other FF…
Overview
This FFT circuit employs unique architectural characteristics providing functionality and capabilities not possible with other FFT implementations. Consequently, floating-point capability is obtained with the LUT/register and memory resources usually associated with lower precision fixed-point designs. For example a 1024-point design uses only ~6662 ALM's vs ~12883 for Altera's equivalent FFT, yet precision is x2 better. Additionally, the locality, simplicity and regularity of the processing core keeps interconnect delays lower than cell delays, leading to reduced power dissipation.
Key features
- FFT size: Any size power-of-two or non-power-of-two
- Dynamic Range: IEEE754 single precision floating point
- Scalability: Array based architecture means higher throughputs are obtained by increasing array size
- Power: Array interconnects are entirely local, reducing parasitic routing capacitance to keep power dissipation low and clock speed high
- Implementation FPGA: Centar's DFT circuit can be used in any FPGA fabric containing embedded multipliers and memories.
- Data I/O: Streaming, normal order I/O
- Input: fixed-point or IEEE754 sigle precision
Benefits
- Programmable architecture easily modified to meet application requirements
- Combined non-power-of-two and power-or-two options
- Fastest commercially available throughputs
- Minimal FPGA hardware resource usage
- Run-time selection forward/inverse
Applications
- Radar imaging, medical imaging, industrial measurement, process control, high performance computing, advanced noise cancellation, high precision signal processing, signal intelligence
What’s Included?
- Netlist (e.g., for Altera FPGAs a verilog *.qxp file for synthesis or *.vo file for simulation)
- Synthesis constraints (e.g., for Altera FPGA’s an *.sdc file)
- Modelsim Testbench (*.vo file for DFT circuit plus verilog testbench for control). Also includes Matlab verification utilities
- Altera Stratix III FPGA board development kit testbench
- Matlab behavioral bit-accurate model (p-code) for LTE FFT transform sizes
- Documentation for above
Specifications
Identity
Files
Note: some files may require an NDA depending on provider policy.
Provider
Learn more about Filters Transforms IP core
No size fits all for signal processing on FPGA (RF Engines)
Employing general-purpose processors for radio DSP
Do's and Don'ts of Architecting the Right FPGA Solution for DSP Design
10 FPGA Design Techniques You Should Know
How to implement double-precision floating-point on FPGAs
Frequently asked questions about Filters and Transforms IP cores
What is Single precision fixed-size streaming floating-point FFT?
Single precision fixed-size streaming floating-point FFT is a Filters Transforms IP core from Centar listed on Semi IP Hub.
How should engineers evaluate this Filters Transforms?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Filters Transforms IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.