The LPDDR5X/5/4X/4 combo PHY IP features a state-of-art mixed-signal architecture that addresses the challenges of DRAM integrati…
Highly scalable performance for classic and generative on-device and edge AI solutions
Scalable and Power-Efficient Neural Processing Units The Neo NPUs offer energy-efficient hardware-based AI engines that can be pa…
LPDDR5X/5/4X/4 combo PHY at Samsung SF5A
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as …
LPDDR5X/5/4X/4 PHY IP for 12nm
The LPDDR5X/5/4X/4 combo PHY IP features a state-of-art mixed-signal architecture that addresses the challenges of DRAM integrati…
LPDDR5/4x/4 PHY IP for Samsung 14LPU
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as …
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as …
IP cores for ultra-low power AI-enabled devices
Each nearbAI core is an ultra-low power neural processing unit (NPU) and comes with an optimizer / neural network compiler.
LPDDR5X/5/4X/4 combo PHY at 7nm
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as …
LPDDR5/4x/4 combo PHY on 14nm, 12nm
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as …
OPENEDGES, the memory system IP provider, including DDR memory controller, DDR PHY, on-chip interconnect, and NPU IP together as …
Highly Scalable and Efficient Second-Generation ML Inference Processor
Arm’s second-generation, scalable and efficient NPU, the Ethos-N78 enables new immersive applications with a 2.5x increase in sin…
Neural Network Acceleration for Automotive AI
State-of-the-art NPU for automotive inference, with many features built-in to maximize performance for a wide range of automotive AI applications.
12bit, 640Msps Dual channel IQ ADC IP Core
Dual channel 12-bit, 640MS/s ADC is essentially a Dual channel 12-bit analog-to-digital converter (ADC) that can function at spee…
16bit 3Msps Sigma Delta ADC in 130nm~22nm
This IP is an 16-bit resolution sigma-delta ADC, can be used in various sensor measurement.
Neuromorphic Processor IP (Second Generation)
Akida is a neural processor platform inspired by the cognitive ability and efficiency of the human brain.
Flow's Parallel Processing Unit solves one of computing's most fundamental dilemmas - parallel processing.
Serial RapidIO 2.1 Endpoint IP Core
The RapidIO Interconnect Architecture is an industry-standard, packet-based interconnect technology that provides a reliable, hig…
In-line Multi-Protocol Cipher Engine
The EIP-96 is an Inline Cryptographic Accelerator designed to accelerate and offload the very CPU intensive IPsec, MACsec, SRTP, …
Aliathon’s Packet Classification core is targeted at replacing expensive & power hungry Network Processors (NPUs) and Content Add…