UPF Constraint coding for SoC - A Case Study
This paper deals with the implementation of UPF for low power SoC design that can encompass several vendor IPs and custom IPs UPF constraints.
Vendor:
HCL Technologies
Category:
Power On Reset (POR)
Power On Reset (POR)
Key features
- The Power on Reset circuit has three configuration and their specifications are listed as below:
- Mode0 1.8 and Mode1 3.3 V supply mode
- MODE 0 Rise and Fall Delay on a slope of 1V/1µs 2.184 and 3.194 µs respectively.
- MODE 0 Rise and Fall Delay on a slope of 1V/100ns 1.284 and 3.144 µs respectively.
- MODE 1 Rise and Fall Delay on a slope of 1V/1us 5.202 and 8.483 µs respectively.
- MODE 1 Rise and Fall Delay on a slope of 1V/100ns 5.068 and 8.279 µs respectively.
- Quiescent Current 5.176 µA
- Area 200 um X 200 um
- Technology Node: GF 40nm 1P7M
- Note: The POR can be configured for both the modes and just for one of the modes Mode 0 and Mode 1 which can work on different supply voltages VDDA and VBAT as shown in Figure 1
Block Diagram
HCLTech_gf40_por_1p8_3p3 block diagram
Benefits
- Start-Up Reset:
- During power-up, the POR triggers the initial system reset. This ensures that the processor or other components start execution from a well-defined state.
- Voltage Monitoring:
- The POR continuously monitors the supply voltage. If supply voltage falls below a certain threshold due to noise, glitches, or power fluctuations, the POR activates a reset pulse. This prevents the IC from operating in an undefined or unreliable state.
- Failure Detection:
- Unexpected voltage drops (e.g., due to a faulty power supply) can lead to system instability. The POR detects such failures and initiates a reset to prevent erratic behavior.
- Safe Operation:
- By enforcing a stable start-up sequence, the POR contributes to overall system reliability.
Silicon Options
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| GlobalFoundries | 40nm | 40 400 nm | — |
Specifications
Identity
Part Number
HCLTech_gf40_por_1p8_3p3
Vendor
HCL Technologies
Type
Silicon IP
Provider
HQ:
India
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Frequently asked questions about Power-On Reset (POR) IP cores
What is Power On Reset (POR)?
Power On Reset (POR) is a Power On Reset (POR) IP core from HCL Technologies listed on Semi IP Hub. It is listed with support for globalfoundries.
How should engineers evaluate this Power On Reset (POR)?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Power On Reset (POR) IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.