Power-On Reset (POR) - Flexible Threshold (down to 0.9V), Low Power (6µA) - X-FAB 0.35µm
This macro-cell is a low consumption Power-On Reset (POR) core designed for X-FAB 0.35µm XH035 CMOS technology.
Overview
This macro-cell is a low consumption Power-On Reset (POR) core designed for X-FAB 0.35µm XH035 CMOS technology.
The core has a voltage sense, an internal current bias circuit and two configurable assertion delays (default are > 1µs and > 20µs). The threshold sensing voltage can be configured from 0.9V to 5.5V (default is 3.0V). A hysteresis of 100mV is added to avoid false reset glitches in noisy supplies.
The core is easily retargeted to any other CMOS technology with R-poly devices.
Key features
- Power-On Reset
- Lowcurrent (typ. 6µA)
- Assertion delays > 1µs and >20µs
- Configurable threshold from 0.9 to 5.5V (3.0V default)
- Hysteresis =100mV
- Indicative area: 0.08mm2
Block Diagram
Specifications
Identity
Files
Note: some files may require an NDA depending on provider policy.
Provider
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Frequently asked questions about Power-On Reset (POR) IP cores
What is Power-On Reset (POR) - Flexible Threshold (down to 0.9V), Low Power (6µA) - X-FAB 0.35µm?
Power-On Reset (POR) - Flexible Threshold (down to 0.9V), Low Power (6µA) - X-FAB 0.35µm is a Power On Reset (POR) IP core from Chipus Microelectronics listed on Semi IP Hub.
How should engineers evaluate this Power On Reset (POR)?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Power On Reset (POR) IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.