Vendor: Analog Bits Inc. Category: Power On Reset (POR)

Power On Reset on TSMC CLN28HPC

The Power-On Reset (POR) macro comprehensively addresses typical SOC start-up power supply monitoring needs, in a fully integrate…

TSMC 28nm HPC View all specifications

Overview

The Power-On Reset (POR) macro comprehensively addresses typical SOC start-up power supply monitoring needs, in a fully integrated easy-to-use macro. The POR includes an internal bandgap style voltage reference circuit which is used as a reference to compare the power supplies against. The POR further includes its own timebase reference circuit, so requires no clock or other synchronizing signal to work correctly. Only when both IO and Core power supplies have both exceeded a user-selected voltage level for a user-selected time, will the outputs signal that power is good.

The POR provides outputs at both the IO and core logic levels, with a low level representing a poor or unstable power supply, and a high level representing a good stable power supply. These signals may be used as logical “RSB” or “ENA” signals.

Block Diagram

Key features

  • Integrated voltage and time references for precision stand-alone operation
  • Easy to integrate with no additional component or special power requirements
  • Easy to use and configure
  • Programmable hysteresis, with independent programming available for power-on and power-off levels,
  • Programmable delay feature to assure power supply settling
  • Implemented with Analog Bits’ proprietary architecture
  • Requires no additional on-chip components, minimizing power consumption

Silicon Options

Foundry Node Process Maturity
TSMC 28nm HPC —

Specifications

Identity

Part Number
Power On Reset on TSMC CLN28HPC
Vendor
Analog Bits Inc.
Type
Silicon IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

Learn more about Power On Reset (POR) IP core

Analog Bits to Participate in a Customer Test Chip Tapeout on TSMC A14 and Present Papers with Cerebras, Arm and Socionext on Real-Time On-Chip Power Sensing and Delivery at 2026 TSMC Global OIP Ecosystem Events

At TSMC 2026 North America OIP Ecosystem Forum, Analog Bits will showcase new real-time power observability and sensing analog IP in TSMC’s N2P process technology and present a paper with Cerebras; Papers planned with partners at global OIP Ecosystem events to highlight smarter power delivery for scalable SoCs targeting data centers, automotive and more.

Frequently asked questions about Power-On Reset (POR) IP cores

What is Power On Reset on TSMC CLN28HPC?

Power On Reset on TSMC CLN28HPC is a Power On Reset (POR) IP core from Analog Bits Inc. listed on Semi IP Hub. It is listed with support for tsmc.

How should engineers evaluate this Power On Reset (POR)?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Power On Reset (POR) IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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