Vendor: Innosilicon Technology Ltd Category: Power On Reset (POR)

Power-On-Reset IP

The Power-On-Reset (POR) IP provides reliable reset functions for general applications.

Overview

The Power-On-Reset (POR) IP provides reliable reset functions for general applications. It is powered by analog supply and monitors both analog and digital supply.

The POR IP generates a POR signal to reset the digital logic. The POR signal is set low if analog supply or digital supply falls below the threshold voltage, and will be set high if both of analog supply and digital supply exceed the threshold voltage.

Key features

  • Low power consumption
  • Built-in low-power bandgap reference
  • Supports multiple voltage levels for versatile applications
  • Ensures quick and reliable system initialization
  • Robust against power supply fluctuations and glitches
  • Reliable operation across a wide temperature range

Block Diagram

POR block diagram

Benefits

  • Low power consumption
  • Fully customizable
  • Small area
  • Simple integration process
  • Chip level integration

Applications

  • Microcontrollers & Microprocessors
  • Integrated Circuits
  • Automotive Electronics
  • Industrial Control Systems

What’s Included?

  • Datasheet
  • Physical Integration Guide
  • Timing Library Model (LIB)
  • Encrypted Verilog Model
  • Library Exchange Format (LEF)
  • GDSII Database
  • Evaluation Board if Available

Specifications

Identity

Part Number
POR
Vendor
Innosilicon Technology Ltd
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Learn more about Power On Reset (POR) IP core

PCIe 5.0: The universal high-speed interconnect for High Bandwidth and Low Latency Applications Design Challenges & Solutions

Innosilicon, a leading IP provider, offers a complete PCIe 5.0 solution stack that includes both PHY and controller IPs. Although both layers are crucial to achieving a fully compliant and high-performance PCIe interface, this paper deep dives into the technical challenges of PHY design, highlighting insights drawn from real-world design margins, receiver robustness, and advanced jitter analysis in the context of Gen5 systems.

Frequently asked questions about Power-On Reset (POR) IP cores

What is Power-On-Reset IP?

Power-On-Reset IP is a Power On Reset (POR) IP core from Innosilicon Technology Ltd listed on Semi IP Hub.

How should engineers evaluate this Power On Reset (POR)?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Power On Reset (POR) IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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