OBSAI Verification IP

The SmartDV's OBSAI Verification IP is fully compliant with OBSAI Reference Point 1 Specification Version 2.1 and Reference Point 3 Specification Version 4.2 and verifies OBSAI interfaces. It includes an extensive test suite covering most of the possible scenarios. It performs all possible protocol tests in a directed or a highly randomized fashion which adds the possibility to create the widest range of scenarios to verify the DUT effectively.

OBSAI Verification IP is supported natively in SystemVerilog, VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA, Specman E and non-standard verification env

OBSAI Verification IP comes with optional Smart Visual Protocol Debugger (Smart ViPDebug), which is GUI based debugger to speed up debugging.

• Compliant with OBSAI Reference Point 1 Specification Version 2.1 and Reference Point 3 Specification Version 4.2.
• Complete OBSAI Tx/Rx functionality.
• Supports the Physical link layer of the OBSAI RP3 specification.
• Supports the Data link layer of the OBSAI RP3 specification.
• Supports test cases as per standard
• Conformance Test Specification Version 1.01
• Supports the different standard bit rates of the OBSAI specification
• 768 Mbps
• 1536 Mbps
• 3072 Mbps
• 6144 Mbps
• Supports CDMA/WCDMA/802.16/LTE framing formats.
• Supports for Frame Clock Burst Messages.
• Supports for RTT Measurement.
• Supports for Virtual Hardware Reset.
• Supports for Line Rate Auto-Negotiation.
• Supports for Ethernet Messaging.
• Support for Transport layer multiplexing/demultiplexing
• Supports scrambler as in OBSAI specification.
• Scrambler can be enabled or disabled.
• Supports insertion of scrambler errors.
• Support disparity and invalid code insertion in 8b/10b.
• Detects and reports the following errors
• Invalid control character
• Invalid data character
• Invalid line code violation
• Invalid 10bit code
• Scrambler errors
• Disparity errors
• Under and oversize frame
• CRC errors
• Framing errors
• Glitch insertion and detection.
• Monitors, detects and notifies the testbench of significant events such as transactions, warnings, timing and protocol violations.
• Supports constraints Randomization.
• Status counters for various events on bus.
• Supports bus accurate timing and timing checks.
• Callbacks in Master, Slave and Monitor for user processing of data.
• OBSAI Verification IP comes with complete compliance test suite to test every feature of OBSAI specifications.
• Functional coverage for complete OBSAI features.

• Faster testbench development and more complete verification of OBSAI designs.
• Simplifies results analysis.
• Runs in every major simulation environment.

• Complete regression suite containing all the OBSAI testcases.
• Examples showing how to connect various components, and usage of Master, Slave and Monitor.
• Detailed documentation of all class, task and function's used in verification env.
• Documentation contains User's Guide and Release notes.