Overview
YMC’s embedded MTP IP owns multiple times of program/erase operation,adopting logic-based structure,and easily ported to different technology and process including logic,mixed mode,high voltage, and BCD.The MTP IP possesses byte read / byte write function.It generally is built to higher density IP ranging from 8K bits up to 1M bits.
Ymtp can be a high endurance (program / erase) NVM IP, generally 10K and even up to 100K. It is developed from low density ( 8 bits ) up to middle density ( 16K bits ).
Ymtp also features wide range of read voltage, low to 1.0V (LV).Unlike typical EPROM, Ymtp implements erase function by electrical mechanism internally instead of requiring costly UV(ultraviolet) light. Charge pumping isn’t integrated into IP inside for the purpose of reducing overall IP size. While operating write function, external high voltage supply (Vpp) is needed. The density of Ymtp is lower, ranging from 8 bits up to 1024 bits.
Learn more about MTP IP core
MagnaChip today announced that it now offers 0.35um and 0.18um standard multiple-time programmable intellectual property (MTP-IP) devices jointly developed with Yield Microelectronics Corporation (YMC) of Taiwan.