What is Low Noise, High PSRR Replica Voltage Regulator?
Low Noise, High PSRR Replica Voltage Regulator is a LDO Voltage Regulator IP core from Weasic Microelectronics listed on Semi IP Hub. It is listed with support for globalfoundries.
Vendor:
Weasic Microelectronics
Category:
LDO Voltage Regulator
Low Noise, High PSRR Replica Voltage Regulator
The WEALDO18NI12SFN32M22G is a voltage regulator operating from 1.8 V.
Overview
The WEALDO18NI12SFN32M22G is a voltage regulator operating from 1.8 V. It provides three output voltages 1.2 V driving output load that sinks specific current. The first output voltage applies to the VCO, the second drives the OutBuffer and the last one drives the digital circuitry.
Key features
- Power Supply : 1.8 V
- Output voltage : 1.2 V
- Quiescent current: 7.3 mA
- Maximum current: 61 mA
- Reference Voltage: 1.2 V
- PSRR : 56 dB @1 KHz
- 32 dB @1 MHz
- Noise @1KHz: -144 dBV/sqrt (Hz)
- (60 nV/sqrt (Hz))
- Noise @1MHz: -178 dBV/sqrt (Hz)
- (1.2 nV/sqrt (Hz))
- Bandwidth: 6.8 KHz
- Drop-out voltage: 16 uV (vdd18 :1.6 V – 1.8 V)
- Load regulation:
- -2.9 mV/mA Iload from 0-60mA
- (-2 mV/mA Iload close to 20mA)
- WakeUp Time (1) : 1.5 ns
- Area : 400 um x 140 um
- Process : 22FDX
- Metal Option : 19
- (1) Cload=10 pF
Block Diagram
WEALDO18NI12SFN32M22G block diagram
Silicon Options
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| GlobalFoundries | 22nm | FDX | — |
Specifications
Identity
Part Number
WEALDO18NI12SFN32M22G
Vendor
Weasic Microelectronics
Type
Silicon IP
Files
Note: some files may require an NDA depending on provider policy.
Provider
HQ:
Greece
Frequently asked questions about LDO Voltage Regulator IP cores
How should engineers evaluate this LDO Voltage Regulator?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this LDO Voltage Regulator IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.