Vendor: 1-VIA Category: LDO Voltage Regulator

Linear Low-Dropout Regulator (Output Voltage 0.9V)

1-VIA’s VSCOM4L400ALDO0V9 IP is a linear Low-Dropout (LDO) voltage regulator providing precise and programmable voltage regulatio…

TSMC 16nm View all specifications

Overview

1-VIA’s VSCOM4L400ALDO0V9 IP is a linear Low-Dropout (LDO) voltage regulator providing precise and programmable voltage regulation across a wide range of input and output voltages (0.81-1.02V, 8 configurations with 30mV trimmability in each configuration) implemented in TSMC12/16nm CMOS FinFET technology.

The regulator architecture provides high Power Supply Rejection (PSR) and low noise making it suitable for analog and RF applications.

Block Diagram

VSCOM4L400ALDO0V9 block diagram

Applications

Artificial Intelligence (AI)
Internet of Things (IoT)
Medical
Analogue-to-Digital Converter (ADC)
RF ASICs
Automotive
Wireless
Digital-to-Analog Converter (DAC)
Mixed-signal ASICs
SoCs

What’s Included?

Datasheet
Characterization report
Layout view (GDSII)
Abstract view (LEF)
Behavioural model (VerilogA)
Integration guidelines and support

Silicon Options

Foundry	Node	Process	Maturity
TSMC	16nm	16nm 160 nm	—

Specifications

Identity

Part Number

VSCOM4L400ALDO0V9

Vendor

1-VIA

Type

Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

1-VIA

HQ: UK

Frequently asked questions about LDO Voltage Regulator IP cores

What is Linear Low-Dropout Regulator (Output Voltage 0.9V)?

Linear Low-Dropout Regulator (Output Voltage 0.9V) is a LDO Voltage Regulator IP core from 1-VIA listed on Semi IP Hub. It is listed with support for tsmc.

How should engineers evaluate this LDO Voltage Regulator?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this LDO Voltage Regulator IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.