I2S PHY & Controller
DTI I2S Controller provides an interface between system bus and Inter-IC Sound devices.
Overview
DTI I2S Controller provides an interface between system bus and Inter-IC Sound devices. The controller is compliant with NXP Inter-IC Sound Bus Specification and AMBA APB Specification. Other bus protocols such as AXI-Lite, AHB-Lite, etc are optionally supported.
Key features
Compliant with the following specifications:
- I2S Bus Specification
- AMBA, Advanced Peripheral Bus (APB) Specification Version 2.0
- AMBA, Advanced High-performance Bus (AHB) Specification Version 2.0
- AMBA, Advanced eXtensibale Bus (AXI) Specification Version 4.0
- AMBA, Advanced eXtensibale Lite Bus (AXI-Lite) Specification Version 4.0
DTI I2S Controller supports:
- Master operation
- Slave operation
- Master and slave operation
- Stereo audio
- I2S, left-justified, right-justified mode
- Audio bit-depth 8/12/16/24/32
- Up to 192 Khz sample rate
- System bus width 8/16/32
- Programmable FIFO watermarks
- Interrupt interface
- DMA interface
- Software interface consistent with AMBA Advanced Peripheral Bus (APB)
Specifications
Identity
Files
Note: some files may require an NDA depending on provider policy.
Provider
Learn more about I2S IP core
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CSoC Platform / Digital Subsystem IP for IoT
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Frequently asked questions about I2S IP cores
What is I2S PHY & Controller?
I2S PHY & Controller is a I2S IP core from Dolphin Technology listed on Semi IP Hub.
How should engineers evaluate this I2S?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this I2S IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.