Expanded Serial Peripheral Interface (xSPI)Master Controller

The Expanded Serial Peripheral Interface (JESD251) Master controller is low signal count, high data bandwidth, primarily for use in computing, automotive, Internet of Things, Embedded system and mobile system processor to connect multiple source of Serial Peripheral Interface (xSPI) slave devices like non-volatile memories, graphics peripherals, networking peripherals,FPGAs, sensors devices.

• Compliance of JEDEC standard JESD251 eXpanded Serial Peripheral Interface (xSPI) for Non Volatile Memory Devices, Version1.0.
• Support Single master, multiple slaves per interface port.
• Support Single Data Rate (SDR) and Double Data Rate (DDR).
• Support Source synchronous clocking.
• Support Data transfer rates up to
  • 400MT/s (200MHz Clock).
  • 333MT/s (167MHz Clock).
  • 266MT/s (133MHz Clock).
  • 200MT/s (100MHz Clock).
• Support Deep Powe Down (DPD) enter and exit commands.
• Support Eight IO ports in standard. Possible to increase IO port based on system performance requirements..
• Optional support for Data Strobe (DS) for write masking.
• Support 1-bit wide SDR transfer.
• Support Profile 1.0 Commands to manage a non-volatile memory device.
• Support Profile 2.0 Commands to support read or write data for any time of slave devices.
  • Non-volatile memory arrays like NOR Flash,NAND Flash,FRAM, nvSRAM.
  • Volatile memory arrays such as SRAM,PSRAM,DRAM.
  • Register mapped Input/Output function.
  • Programmable function devices such as FPGA.

• Verilog Source code.
• User Guide.
• IP Integration Guide.
• Run and Synthesis script.
• Encrypted Verification Testbench Environment.
• Basic Testsuite.