Vendor: MAXVY Technologies Pvt Ltd Category: I2C / I3C

ETSI SSP I3C Interface

The I3C interface for the communication of an Smart Secure Platform(SSP), as defined in ETSI using the Smart Secure Platform Comm…

Overview

The I3C interface for the communication of an Smart Secure Platform(SSP), as defined in ETSI using the Smart Secure Platform Common Layer (SCL) protocol. The use of the MIPI I3C Basic bus specification provides the ETSI SSP with a multitude of benefits, such as higher data rate, flexible and efficient information exchange, and strong integration of SSP in connected devices. The ETSI SSP is a highly secure, scalable and cost-efficient.

Key features

  • The main MIPI I3C features used in the ETSI specification
    • IBI support with payload
    • Single Data Rate
    • Power management
    • Power saving mode
    • Operating voltages
    • Dynamic Addressing
    • CCC commands Broadcast and Direct
    • Hot-join (in case of removable SSP TBD)
  • The SSP features in I3C
    • The SSP is Target Only
    • One SSP per system

Block Diagram

Specifications

Identity

Part Number
ETSI SSP I3C Interface IP
Vendor
MAXVY Technologies Pvt Ltd
Type
Silicon IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

Learn more about I2C / I3C IP core

From I2C to I3C: Evolution of Two-Wire Communication in Embedded Systems

The I2C (Inter-Integrated Circuit) Bus invented in 1980 by Philips Semiconductors (NXP Semiconductors today) was a massive step forward in simplifying communications in embedded systems. It is a simple two-wire interface for synchronous, multi-master/multi-slave, single ended serial communication. Fast forward 45 years to today and it is still widely used for attaching low speed peripheral Integrated Circuits (ICs), processors and microcontrollers. But silicon today has changed...

Maximizing the Usability of Your Chip Development: Design with Flexibility for the Future

Early in my career selling chips for Motorola Semiconductor, the ability to spin derivative microcontroller chips for a customer’s specific requirement was relatively straightforward. If the volume looked reasonable, we would tape-out a new chip with a few added features because mask costs and wafers were relatively inexpensive at the larger process nodes. The customer won by getting an MCU tailored to their specific need, and Motorola won by gaining a more committed customer plus another SKU that could be sold to other customers – boosting ROI. With the migration to higher cost FinFET nodes, those times are long gone as the economics no longer work.

MIPI CCI over I3C: Faster Camera Control for SoC Architects

Imagine a camera subsystem that responds in microseconds, consumes less power, and offers a more straightforward route to time-to-market. For SoC architects and IP integration teams, that vision is increasingly possible with MIPI Camera Control Interface (CCI) over I3C.

Frequently asked questions about I2C / I3C IP cores

What is ETSI SSP I3C Interface?

ETSI SSP I3C Interface is a I2C / I3C IP core from MAXVY Technologies Pvt Ltd listed on Semi IP Hub.

How should engineers evaluate this I2C / I3C?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this I2C / I3C IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP