Vendor: TurboConcept Category: Channel Coding

DVB-T2 LDPC+BCH decoder

The TC4500 Core complies with DVB-T2 specifications.

Overview

The TC4500 Core complies with DVB-T2 specifications. It covers all the FEC and modulation options, including L1 signalling modes. The Core is based on a low complexity architecture, and is available for FPGA or ASIC implementation.

Key features

  • I/Q demapping (BPSK, QPSK, 16QAM, 64QAM and 256QAM)
  • Bit deinterleaver (16,64 and 256 QAMs)
  • inner LDPC decoding
  • outer BCH decoding
  • 16kbit and 64kbit frames
  • Supports L1 pre and post-signalling modes
  • Syndrome-based LDPC iteration stopping
  • Frame error detection indication
  • Built-in SNR estimation

Applications

  • DVB-T2

Specifications

Identity

Part Number
TC4500
Vendor
TurboConcept
Type
Silicon IP

Files

Note: some files may require an NDA depending on provider policy.

Provider

HQ: FRANCE

Learn more about Channel Coding IP core

Practical Considerations of LDPC Decoder Design in Communications Systems

This paper covers some practical aspects of designing the LDPC decoder starting from comparison between different techniques, different decoders parameters or standards, the effect of those parameters on the LDPC performance, also it discusses the algorithm selection process, and floating point implementation process.

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Frequently asked questions about Channel Coding IP cores

What is DVB-T2 LDPC+BCH decoder?

DVB-T2 LDPC+BCH decoder is a Channel Coding IP core from TurboConcept listed on Semi IP Hub.

How should engineers evaluate this Channel Coding?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Channel Coding IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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