Direct Digital Synthesizer / Periodic waveform generator

The DDS IP Core is a high-precision Direct Digital Synthesizer2 used for the generation of periodic waveforms. On each rising-edge of the sample clock and when the clock-enable is high, the phase in the phase accumulator is incremented by the value phase_inc. This phase is quantized to 16-bits and passed as an address to a look-up table which converts the phase into a waveform.

To save resources, the look-up table is implemented as a quarter sine wave (16384 x 15-bit samples). These samples are manipulated to generate 65536 x 16-bit samples over the range 0 to 2Pi. By setting the generic parameter lutsize to 12 or 8, the size of the LUT can be reduced further to (1024 x 11-bit) or (64 x 7-bit) if required.

In addition to the quadrature outputs sin_out and cos_out, the DDS also provides square wave and sawtooth outputs: squ_out and saw_out. All output values are 16-bit signed numbers.

• Synthesizable, technology independent IP Core fro FPGA, ASIC and SoC
• Supplied as human readable VHDL (or Verilog) source code
• 16-bit signed output data samples
• 32-bit phase accumulator (tuning word)
• 32-bit phase shift feature
• Phase resolution of 2π / 216
• Frequency resolution of FS / 232 (FS = sample frequency)
• Phase dithering option for improved SFDR
• ≈ 100 dB SNR and > 110 dB SFDR (with phase dithering enabled)
• Simultaneous SIN, COS, square and sawtooth outputs
• Optimized quarter-wave LUT for reduced area footprint
• Sample rates of 350 MHz+1

• Digital oscillators and phase-locked loops
• Digital modulation/demodulation
• Digital up/down converters and mixers
• Generation of quadrature (complex) signals
• Versatile waveform generation