Vendor: Lattice Semiconductor Corp. Category: Filters Transforms

Digital Front End (DFE) Demo

Lattice DFE (Digital Front End) demo provides a digital solution consisting of CPRI (Common Public Radio Interface), DUC (Digital…

Overview

Lattice DFE (Digital Front End) demo provides a digital solution consisting of CPRI (Common Public Radio Interface), DUC (Digital Up Converter) and CFR (Crest Factor Reduction) for 2 antenna, LTE (Long-Term Evolution) 2x2 MIMO (Multiple-Input, Multiple-Output) application. The demo design has been designed to work with the LatticeECP3 I/O Protocol Board.



The demo uses Ethernet to transfer DFE stimulus and output data between a PC and the board. The stimulus and output data of DFE are stored in on-board DDR3 memory.

Key features

  • 2.45Gbps CPRI line rate: 2 x 20MHz LTE baseband signals
  • Input 20MHz LTE baseband signal bandwidth with 30.72Msps sample rate
  • Output data with 122.88Msps sample rate
  • DUC (Digital Up Conversion): two antennas, parallel processing
  • CFR (Crest Factor Reduction): two stages with total 10 clip engines with two antennas
  • DUC and CFR work frequency: 122.88MHz
  • Input signed 15-bit I/Q data
  • Output signed 16-bit I/Q data
  • Gigabit Ethernet connection
  • 500Mbps DDR3 data rate

Block Diagram

Specifications

Identity

Part Number
DFEDemo
Vendor
Lattice Semiconductor Corp.
Type
Silicon IP

Files

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Provider

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Frequently asked questions about Filters and Transforms IP cores

What is Digital Front End (DFE) Demo?

Digital Front End (DFE) Demo is a Filters Transforms IP core from Lattice Semiconductor Corp. listed on Semi IP Hub.

How should engineers evaluate this Filters Transforms?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Filters Transforms IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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