Vendor: HCL Technologies Category: LDO Voltage Regulator

Capless Analog LDO Regulator

HCLTech offers a low drop-out (LDO) voltage regulator that has been designed in a 40nm GF technology.

GlobalFoundries 40nm View all specifications

Overview

HCLTech offers a low drop-out (LDO) voltage regulator that has been designed in a 40nm GF technology. It offers benefits of low dropout voltage, micropower operation and miniaturized packaging. The core of LDO voltage regulator consists of error amplifier, pass transistor. Capless LDO regulator(hcl_gf_40_ldo_3p3v_1p8v_15ma) is designed for the input voltage of 3.3V and 15mA output current. The area of the regulator is (300×300) sq.µm. The quiescent current is 153µA and is stable over the entire range of output load current (0 mA to 15 mA).

Key features

  • Output current range is 0-15mA.
  • Short Circuit Current Limiting and Overtemperature Protection
  • Shutdown current< 312nA .
  • DC load regulation< 0.99%
  • DC line regulation < 0.041%
  • Transient overshoot and undershoot is within ±1 %.
  • Area W X L = (300×300) sq.µm.

Block Diagram

Applications

  • Supply input for PLL, FUSE, RCOSC, SOSC

Silicon Options

Foundry Node Process Maturity
GlobalFoundries 40nm 40 400 nm

Specifications

Identity

Part Number
HCLTech_gf_40_ldo_3p3v_1p8v_15ma
Vendor
HCL Technologies
Type
Silicon IP

Provider

Learn more about LDO Voltage Regulator IP core

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Frequently asked questions about LDO Voltage Regulator IP cores

What is Capless Analog LDO Regulator?

Capless Analog LDO Regulator is a LDO Voltage Regulator IP core from HCL Technologies listed on Semi IP Hub. It is listed with support for globalfoundries.

How should engineers evaluate this LDO Voltage Regulator?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this LDO Voltage Regulator IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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