Learn more about Coherency IP core
Many people have heard the term cache coherency without fully understanding the considerations in the context of system-on-chip (SoC) devices, especially those using a network-on-chip (NoC). To understand the issues at hand, it’s first necessary to understand the role of cache in the memory hierarchy.
Dimitry Pavlovsky, Cadence
Dimitry Pavlovsky
Cache coherency, long regarded as one of the most complex verification challenges, is no longer an issue for CPU developers only.
In this paper, we present the round-robin method applied to baseline coherency protocol and initial analysis of one hybrid protocol that performs speculative requests when access patterns are detected. We also propose to manage patterns through a dedicated hardware component attached to each core of the processor.