Asynchronous Communications Interface Adapter (ACIA)

The following information applies to both the Chip and Core versions of this 65xx brand microprocessor family member.

WDC's high volume production proven 65xx brand microprocessor family of manually designed GDSII hard cores are highly optimized cores that are small and low power and therefore an excellent choice for low power System-on-Chip (SoC) ASIC microcontroller designs. These static cores support a wide range of applications from radiation resistant hi-rel applications such as medical implantable life-support devices to ultra high volume consumer devices.

The WDC CMOS W65C51S Asynchronous Communications Interface Adapter (ACIA) provides an easily implemented, program controlled interface between microprocessor based systems and serial communication data sets and modems.

The ACIA has an internal baud rate generator. This feature eliminates the need for multiple component support circuits. The Transmitter baud rate can be selected under program control to be 1 of 15 different rates from 50 to 19,200 baud, or at 1/16 times an external clock rate. The Receiver baud rate may be selected under program control to be either the Transmitter rate or at 1/16 times the external clock rate. The ACIA has programmable word lengths of 5, 6, 7 or 8 bits; even, odd or no parity 1, 1½ or 2 stop bits.