ARINC 818 Streaming IP Core
ARINC 818 is a point-to-point serial protocol primarily used in avionics applications and supports the transmission of video, aud…
Overview
ARINC 818 is a point-to-point serial protocol primarily used in avionics applications and supports the transmission of video, audio, and data. It is a flexible protocol that supports a wide variety of data rates and image formats.
The ARINC 818 Streaming core is an IP block that allows an FPGA to easily interface with an ARINC 818 input or output. It converts the ARINC 818 data stream to/from a parallel pixel bus to facilitate the development of custom FPGA logic. The core handles all aspects of maintaining the ARINC 818 link: encoding/decoding, delimiter insertion/removal, and transmission of idles.
Video parameters (resolution, pixel depth, etc.) are user modifiable and the core can be configured to cover a wide range of possible ICDs. The core also features a built in timing engine that automatically regulates timing characteristics (Frame Rate, Line Rate, etc.) to user specification. The flexibility of user ICD definition allows standard video formats like 1080p @ 60Hz and 1280×1024 @ 60Hz but also custom and unique resolutions or timing parameters.
The core performs a real-time, low latency conversion, which makes it ideal for use with protocol bridging and real-time image processing applications. This design is a lightweight counterpart to the complete embedded solution, the ARINC 818 DMA IP Core.
Key features
- Flexible video pixel bus input with synchronization signals (video_active, vsync, hsync) that supports a wide range of pixel depths and number of parallel pixels
- Compatible with all FC line rates up to 10G (incl. non-standard rates)
- Core handles synchronization and clock crossing into the FC clock domain. User clock can be asynchronous to the FC clock
- Automatic creation and maintenance of the Object 0 and container header
- 8b/10b encoding/decoding of FC data. Core manages K-Characters and running disparity
Block Diagram
Benefits
- RX (Receive) and TX (Transmit) functionality included
- User-configurable frame rates, line rates, and ADVB frame spacing
- Built-in timing engine controls/regulates timing in hardware
Applications
- Real-time protocol conversions to/from ARINC 818
- ARINC 818 data generation for hardware offload
- Real-time ARINC 818 processing
Specifications
Identity
Videos
Files
Note: some files may require an NDA depending on provider policy.
Provider
Learn more about Video Transport IP core
Introduction to Embedded DisplayPort (eDP) version 1.5
Enabling High Performance SoCs Through Multi-Die Re-use
An HDTV SoC Based on a Mixed Circuit-Switched / NoC Interconnect Architecture (STBus/VSTNoC)
Steps for Delivering Multimedia Over 5 GHz WLANs
Tutorial: The H.264 Scalable Video Codec (SVC)
Frequently asked questions about Video Transport IP cores
What is ARINC 818 Streaming IP Core?
ARINC 818 Streaming IP Core is a Video Transport IP core from New Wave Design & Verification listed on Semi IP Hub.
How should engineers evaluate this Video Transport?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Video Transport IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.