Vendor: SmartDV Technologies Category: Protocol Bridge

AMBA 3 AHB Bus Verification IP

AMBA 3 AHB Bus Verification IP provides a smart way to verify the AMBA 3 AHB component of a SOC or an ASIC.

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Verification IP View all specifications

Overview

AMBA 3 AHB Bus Verification IP provides a smart way to verify the AMBA 3 AHB component of a SOC or an ASIC. The SmartDV's AMBA 3 AHB Bus Verification IP is fully compliant with standard AMBA 3 AHB specification. Our AMBA 3 AHB Bus VIP is proved across multiple customers.

AMBA 3 AHB Bus Verification IP is supported natively in SystemVerilog, VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA, Specman E and non-standard verification env

AMBA 3 AHB Bus Verification IP comes with optional Smart Visual Protocol Debugger (Smart ViPDebug), which is GUI based debugger to speed up debugging.

Key features

  • Compliant with ARM AMBA 3 AHB specification.
  • Supports ARM11 extension.
  • Supports AHB Master, Slave, Bus, Monitor and Checker.
  • Support for multiple Masters and Slaves.
  • Supports all AHB data widths and address widths.
  • Supports all protocol transfer types, burst transfers and response types.
  • Support for all the transfer sizes.
  • Supports constrained randomization of protocol attributes.
  • Slave supports fine grain control of response per address or per transaction.
  • Master supports fine grain control of busy state insertion and Master aborting.
  • Supports Early burst termination and locked transfers.
  • Supports split and retry transfers.
  • Continue or cancel of a transfer on error response.
  • Support for programmable wait states or delay insertion.
  • Ability to inject errors during data transfer.
  • Programmable Timeout insertion.
  • Flexibility to send completely configured data.
  • Supports FIFO memory.
  • Rich set of configuration parameters to control AHB functionality.
  • On-the-fly protocol and data checking.
  • Notifies the testbench of significant events such as transactions, warnings, timing and protocol violations.
  • Built in coverage analysis.
  • Callbacks in Master, Slave, Bus and Monitor for various events.
  • Status counters for various events on bus.
  • AHB Bus Verification IP comes with complete testsuite to test every feature of AMBA 3 AHB specification.

Block Diagram

AMBA 3 AHB Bus VIP block diagram

Benefits

  • Faster testbench development and more complete verification of AMBA 3 AHB designs.
  • Easy to use command interface simplifies testbench control and configuration of Master, Slave and Bus.
  • Simplifies results analysis.
  • Runs in every major simulation environment.

What’s Included?

  • Complete regression suite containing all the AMBA 3 AHB testcases.
  • Examples showing how to connect various components, and usage of BFM and Monitor.
  • Detailed documentation of all class, task and function's used in verification env.
  • Documentation also contains User's Guide and Release notes.

Specifications

Identity

Part Number
AMBA 3 AHB Bus VIP
Vendor
SmartDV Technologies
Type
Verification IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

SmartDV Technologies
HQ: India
At SmartDV Technologies™, we believe there’s a better way to approach semiconductor intellectual property (IP) for integrated circuits. We’ve been focused exclusively on IP since 2007—so whether you’re sourcing standards-based design IP for your next SoC, ASIC, or FPGA, or seeking verification solutions (VIP) to put your chip design through its paces, you’ll find SmartDV’s IP straightforward to integrate. By combining proprietary SmartCompiler™ technology with the knowledge of hundreds of expert engineers, SmartDV can customize IP to meet your unique design objectives: quickly, economically, and reliably. Don’t allow other suppliers to force one-size-fits-all cores into your chip design. Get the IP you need, tailored to your specifications, with SmartDV: IP Your Way.
Contact SmartDV Technologies

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Frequently asked questions about Protocol Bridge IP cores

What is AMBA 3 AHB Bus Verification IP?

AMBA 3 AHB Bus Verification IP is a Protocol Bridge IP core from SmartDV Technologies listed on Semi IP Hub.

How should engineers evaluate this Protocol Bridge?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Protocol Bridge IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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