64-bit High performance Single Core Microprocessor

VEGA AS1161 features an out-of-order processing engine with a 16 stage pipeline enabling it to meet next gen computational requirements. The processor also supports single and double precision floating point instructions, and MMU for Linux based applications. AS1161 is optimized for high performance with integrated Instruction Cache, Data Cache and an advanced branch predictor enabling efficient branch execution. Features also include PLIC and vectored interrupts for serving various types of system events. An AXI or AHB interface enables ease of system integration and JTAG debug interface for development support.

• RISC-V 64G (RV64IMAFD) ISA
• 13-16 stage out-of-order pipeline implementation
• Advanced branch predictor: BTB, BHT, RAS
• Harvard architecture
• Privilege Levels : User-, Supervisor- and Machine-mode
• Fully-featured memory subsystem with Linux support
  • Memory Management Unit
  • Page-based virtual memory
  • Configurable L1 caches
• High-performance IEEE 754-2008 compliant floating-point unit
• Vectored interrupt support
• Platform Level Interrupt Controller
  • Up to 127 IRQs
  • Low interrupt latency
• AXI4- / ACE, AHB- compliant external interface
• Advanced Integrated Debug Controller
  • JTAG compliant interface
  • HW/SW breakpoints support
• Debug extension allowing Eclipse debugging via a GDB
  • openOCD
  • JTAG connection
• Linux compatible
• Zephyr compatible
• FreeRTOS port

• Media Server
• Single Board Computer
• Storage devices
• Energy Gateway
• Electricity Grid and Distribution
• Building Safety
• Circuit Breaker
• Smart Power Socket, Light Switch
• Networking
• Medical Imaging
• Defibrillator
• Hospital Admission Machine
• Powered Patient Beds
• Vital Signs Monitor
• Biometric access control
• Public Address Systems

• RTL Source Code
• Test Benches
• Synthesis Scripts
• Product Specification
• User Guide
• Integration Guidelines