3.3V 32kHz RTC, 50MHz Low Power Oscillator, and Programmable 100MHz Oscillator Pad Set
The Oscillators library provides oscillators for on-chip asynchronous clock generation with an appropriate external crystal.
Overview
What’s Included?
- a. Physical abstract in LEF format (.lef)
- b. Timing models in Synopsys Liberty formats (.lib and .db)
- c. Calibre compatible LVS netlist in CDL format (.cdl)
- d. GDSII stream (.gds)
- e. Behavioral Verilog (.v)
- f. Layout Parasitic Extraction (LPE) SPICE netlist (.spice)
- g. Databook (.pdf)
- h. Library User Guide - ESD Guidelines (.pdf)
Silicon Options
| Foundry | Node | Process | Maturity |
|---|---|---|---|
| GlobalFoundries | 55nm | 55 550 nm | Silicon Proven |
Specifications
Identity
Files
Note: some files may require an NDA depending on provider policy.
Provider
Learn more about Oscillator IP core
Aragio Solutions Offers Suite of Programmable GPIO I/O Libraries Supporting 65nm Common Platform Technology Available for Chartered Customers
Aragio Solutions Offers Suite of High-Performance Mixed-Signal IP and I/O Libraries Targeted to Advanced Processes from Chartered
Frequently asked questions about Oscillator IP cores
What is 3.3V 32kHz RTC, 50MHz Low Power Oscillator, and Programmable 100MHz Oscillator Pad Set?
3.3V 32kHz RTC, 50MHz Low Power Oscillator, and Programmable 100MHz Oscillator Pad Set is a Oscillator IP core from Aragio Solutions listed on Semi IP Hub. It is listed with support for globalfoundries Silicon Proven.
How should engineers evaluate this Oscillator?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Oscillator IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.