Vendor: Attopsemi Technology Category: eFuse / OTP

256x1 Bits OTP (One-Time Programmable) IP, UMC 110 nm 1.2V/3.3V L110AE Process

The AT256X1U110MAE0AB is organized as 256 bits by 1 one-time programmable in 1-bit read and 1-bit program modes.

UMC 110nm Silicon Proven View all specifications

Overview

The AT256X1U110MAE0AB is organized as 256 bits by 1 one-time programmable in 1-bit read and 1-bit program modes. This is a kind of non-volatile memory fabricated in UMC 110nm standard CMOS core logic process. The OTP can be widely used in chip ID, security key, memory redundancy, parameter trimming, configuration setting, feature selection, and PROM, etc.

Key features

  • Fully compatible with UMC Logic/Mixed-Mode 110nm Aluminum Enhancement Shrinkable CMOS process
  • Low program voltage: 3.8V±5% VDDP and 1.2V VDD
  • Low read voltage: 1.08–1.32V VDD and VDDP
  • High speed: 10µs program time per bit
  • Wide temperature: -40°C to 125°C for read and 25°C for program

Benefits

  • Small IP size
  • Low program voltage/current
  • Low read voltage/current
  • High reliability
  • Wide operating temperature
  • Silicon characterized and qualified

What’s Included?

  • Datasheet
  • Verilog behavior model and test bench
  • Timing library
  • LEF File
  • Phantom GDSII database

Silicon Options

Foundry Node Process Maturity
UMC 110nm 110nm 1100 nm Silicon Proven

Specifications

Identity

Part Number
AT256X1U110MAE0AB
Vendor
Attopsemi Technology
Type
Silicon IP

Provider

Learn more about eFuse / OTP IP core

I-fuse: Most Reliable and Fully Testable OTP

Patented by Attopsemi™, I-fuse™ is a revolutionary non-breaking fuse technology that can be reliably programmed by heat assisted electromigration below a break point. Any cell can be tested as programmable if the initial fuse resistance is low enough (e.g. <400 ohms) to generate enough heat for programming.

I-fuse OTP - The OTP of Choice

OTP stands for “One-Time Programmable”, a device that can only be programmed once to permanently store any kind of information (data for chip IDs, security keys, product feature selection, memory redundancy, device trimming, or MCU code memory). Every chip needs OTPs, as long as they are reliable, available, and affordable.

Why Hardware Root of Trust Needs Anti-Tampering Design

The hardware root of trust (HRoT) provides the trust base (root key), hardware identifier (UID), hardware unique key (HUK), and entropy required for the secure operation of the entire chip and therefore is often the focus of hacker attacks. If the design can’t effectively resist attacks, hackers can easily obtain the secrets of the entire chip. Attackers can use the secrets to crack identity authentication and data encryption and steal product design know-how, causing application security problems.

Optimizing Sensor Performance with 1T-OTP Trimming

A sensor is a device that detects a change in a stimulus and converts it into an electronic signal that can be measured or recorded. The stimulus can be many things, including a physical property, environmental parameter, chemical composition or a location, to name just a few. All sensing elements have nonlinearities that include an intrinsic nonlinearity over sensing range along with offset and sensitivity nonlinearity variations over temperature.

Solving Chip Security's Weakest Link

With the invention of Physical Unclonable Functions (PUF), we can now create a unique, inborn, unclonable key at the hardware level. The natural follow-up question to this is, “but how do we protect this key?” It is like storing your key to secrets in a drawer, a surefire way to break the secure boundary and create vulnerabilities.

Securing Smart Connected Homes with OTP NVM

The market for piracy is huge and hackers have become increasingly sophisticated even when security is implemented in hardware. The race between the aggressors and protectors is a battle without end. Smart connected home devices are increasingly storing and processing very sensitive and private user data in addition to attempting to deliver copyright protected content from service providers. Protecting consumer data is vital.

Frequently asked questions about eFuse / OTP IP cores

What is 256x1 Bits OTP (One-Time Programmable) IP, UMC 110 nm 1.2V/3.3V L110AE Process?

256x1 Bits OTP (One-Time Programmable) IP, UMC 110 nm 1.2V/3.3V L110AE Process is a eFuse / OTP IP core from Attopsemi Technology listed on Semi IP Hub. It is listed with support for umc Silicon Proven.

How should engineers evaluate this eFuse / OTP?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this eFuse / OTP IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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