Vendor: Attopsemi Technology Category: eFuse / OTP

128x8 Bits OTP (One-Time Programmable) IP, SMIC 110nm 1.2V/3.3V Mixed Signal HE Process

The AT128X8Z110LL0AA is organized as 128 bits by 8 one-time programmable in 8-bit read and 1-bit program modes.

SMIC 110nm HE Silicon Proven View all specifications

Overview

The AT128X8Z110LL0AA is organized as 128 bits by 8 one-time programmable in 8-bit read and 1-bit program modes. This is a kind of non-volatile memory fabricated in SMIC110nm mixed signal generic process. The OTP can be widely used in chip ID, security key, memory redundancy, parameter trimming, configuration setting, feature selection, and PROM, etc.

Key features

  • Fully compatible with standard SMIC 110nm CMOS logic process
  • Low program voltage: 3.7±0.1V VDDP andVDDP2, and 1.0V ± 100mV VDD, 1 bit at a time
  • Low read voltage: 1.35V ± 50mV VDDP and VDDP2 and 1.0V ± 100mV VDD, 8 bits at a time
  • High speed: 10µs program time per bit and read cycle 80ns (12.5MHz) 8-bit at a time
  • Asynchronous address and control input and latched output. CMOS levels I/Os
  • One redundant row, with identical performance and reliability of iFuse TM cells as those on normal rows, to store any information.
  • Built-in I-FuseTM protection circuit
  • Built-in margin mode and test modes to generate pseudo-checkerboard patterns
  • Wide temperature: -40°C to 125°

Benefits

  • Small IP size
  • Low program voltage/current
  • Low read voltage/current
  • Wide operating temperature
  • High reliability
  • Silicon characterized and qualified

What’s Included?

  • Datasheet
  • Verilog behavior model and test bench
  • Timing library
  • LEF File
  • Phantom GDSII database

Silicon Options

Foundry Node Process Maturity
SMIC 110nm HE Silicon Proven

Specifications

Identity

Part Number
AT128X8Z110LL0AA
Vendor
Attopsemi Technology
Type
Silicon IP

Provider

Learn more about eFuse / OTP IP core

I-fuse: Most Reliable and Fully Testable OTP

Patented by Attopsemi™, I-fuse™ is a revolutionary non-breaking fuse technology that can be reliably programmed by heat assisted electromigration below a break point. Any cell can be tested as programmable if the initial fuse resistance is low enough (e.g. <400 ohms) to generate enough heat for programming.

I-fuse OTP - The OTP of Choice

OTP stands for “One-Time Programmable”, a device that can only be programmed once to permanently store any kind of information (data for chip IDs, security keys, product feature selection, memory redundancy, device trimming, or MCU code memory). Every chip needs OTPs, as long as they are reliable, available, and affordable.

Frequently asked questions about eFuse / OTP IP cores

What is 128x8 Bits OTP (One-Time Programmable) IP, SMIC 110nm 1.2V/3.3V Mixed Signal HE Process?

128x8 Bits OTP (One-Time Programmable) IP, SMIC 110nm 1.2V/3.3V Mixed Signal HE Process is a eFuse / OTP IP core from Attopsemi Technology listed on Semi IP Hub. It is listed with support for smic Silicon Proven.

How should engineers evaluate this eFuse / OTP?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this eFuse / OTP IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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