Single Port SRAM Compiler IP, UMC 0.13um SP process
UMC 0.13um HS/FSG Logic process synchronousultra high speed Single Port SRAM memory compiler.
- UMC
- 130nm
- SP
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
Single Port SRAM Compiler IP, UMC 0.13um SP process
UMC 0.13um HS/FSG Logic process synchronousultra high speed Single Port SRAM memory compiler.
Single Port SRAM Compiler IP, UMC 0.13um LL process
UMC 0.13um LL Logic/FSG process high density synchronous high density Single Port SRAM memory compiler.
Single Port SRAM Compiler IP, UMC 0.13um HS/FSG process
UMC 0.13um HS/FSG standard process synchronous high density Low Power Single Port SRAM memory compiler.
Single Port SRAM Compiler IP, UMC 0.11um SP process
UMC 0.11um eFlash SP process, Single Port SRAM compiler.
Single Port SRAM Compiler IP, UMC 0.11um LL process
UMC 0.11um low leakage process Synchronous high density Single Port SRAM compiler.
Single Port SRAM Compiler IP, UMC 0.11um HS/FSG process
UMC 0.11um HS Logic process synchronous, high density Single Port memory compiler.
Single Port SRAM Compiler IP, UMC 0.11um HS/FSG process
UMC 0.11um HS/FSG Logic process, 1.41um2-Bit cell Single Port SRAM memory compiler.
Single Port SRAM Compiler IP, UMC 0.11um HS/AE process
UMC 0.11um HS/AE Logic process synchronous High-density Single Port SRAM memory compiler.
Single Port SRAM Compiler IP, UMC 0.11um HS/AE process
UMC 0.11um HS/AE (AL Enhancement) Logic process Ultra high speed Synchronous Single Port SRAM memory compiler.
Single Port SRAM Compiler IP, UMC 0.11um eFlash/HS process
UMC 0.11um eFlash HS process, Single Port SRAM memory compiler.
Single Port SRAM Compiler IP, High density, UMC 0.13um HS/FSG process
UMC 0.13um HS/FSG Logic process high density synchronous Single Port SRAM memory compiler.
SATA II PHY IP, UMC 55nm SP process
Serial ATA I, II PHY, UMC 55nm SP/RVT Low-K Logic process.
ROM Compiler IP, UMC 90nm SP process
UMC 90nm/ Low-K SP/RVT VIA1 Programmable ROM compiler.
ROM Compiler IP, UMC 55nm LP process
UMC 55nm LP/ Low-K PG Via1 ROM compiler.
ROM Compiler IP, UMC 55nm eFlash process
UMC 55nm eFlash Via1 ROM compiler with HVT.
ROM Compiler IP, UMC 40nm LP process
UMC 40nm LP via1 ROM compiler with Sleep mode & peripheral LVT.
ROM Compiler IP, UMC 40nm LP process
UMC 40nm LP Via1 ROM compiler with Sleep mode.
ROM Compiler IP, UMC 40nm LP process
UMC 40nm LP Logic process Via ROM compiler with peripheral LVT and WL booster.
ROM Compiler IP, UMC 40nm LP process
UMC 40nm LP Logic process Via ROM compiler with WL booster.
ROM Compiler IP, UMC 28nm HLP process
UMC 28nm HLP/ Low-K Via ROM compiler.