0.13um DSP Based Fast Ethernet PHY, based on FXEDP110HC0A HJ026a and add 100BASE-FX feature.
0.13um DSP Based Fast Ethernet PHY, based on FXEDP110HC0A HJ026a and add 100BASE-FX feature.
- UMC
- 130nm
- HS
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
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Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
0.13um DSP Based Fast Ethernet PHY, based on FXEDP110HC0A HJ026a and add 100BASE-FX feature.
0.13um DSP Based Fast Ethernet PHY, based on FXEDP110HC0A HJ026a and add 100BASE-FX feature.
10BASE-T/100BASE-TX/100BASE-FX Energy Efficient Ethernet PHY; UMC 28nm HPC/Low-K process
10BASE-T/100BASE-TX/100BASE-FX Energy Efficient Ethernet PHY; UMC 28nm HPC/Low-K process
40nm LPDDR3-PHY Data block for LightCo ; UMC 40nm LP/LVT Logic Process
40nm LPDDR3-PHY Data block for LightCo ; UMC 40nm LP/LVT Logic Process
LPDDR3-PHY Command/address block for LightCo ; UMC 40nm LP/RVT Logic Process
LPDDR3-PHY Command/address block for LightCo ; UMC 40nm LP/RVT Logic Process
40nm LPDDR2-PHY data block for SIP
40nm LPDDR2-PHY data block for SIP
40nm LPDDR2-PHY command/address block for SIP
40nm LPDDR2-PHY command/address block for SIP
40nm LP DDR3/4 LPDDR23 COMBO PHY DATA Block for Flip Chip usage
40nm LP DDR3/4 LPDDR23 COMBO PHY DATA Block for Flip Chip usage
UMC 40nm LP process DDR34/LPDDR23 COMPENSATION Block with 2.5V Device
UMC 40nm LP process DDR34/LPDDR23 COMPENSATION Block with 2.5V Device
DDR34 COMBO PHY ADDR Block for Solder bump Flip chip version ;UMC 40nm LP/RVT Logic Process
DDR34 COMBO PHY ADDR Block for Solder bump Flip chip version ;UMC 40nm LP/RVT Logic Process
DDR3/DDR3L/LPDDR2 combo PHY ( not support DDR3 leveling function), data block;UMC 40nm LP/RVT LowK Logic Process .
DDR3/DDR3L/LPDDR2 combo PHY ( not support DDR3 leveling function), command / address block,UMC 40nm LP/RVT LowK Logic Process.
DDR3 Combo PHY Data Block for solder bump application; UMC 40nm LP/RVT Logic Process
DDR3 Combo PHY Data Block for solder bump application; UMC 40nm LP/RVT Logic Process
Data Block of DDR3/DDR3L/DDR2/LPDDR2/LPDDR Combo PHY for Chip Application (compliant to DFI); UMC 55nm SP/RVT LowK Logic Process
UMC 55NM SP-RVT with 2.5V device process 16BIT DDR23 COMBO DATA PHY for two layer PCB board usage
UMC 55NM SP-RVT with 2.5V device process 16BIT DDR23 COMBO DATA PHY for two layer PCB board usage
DDR3 Combo PHY Compensation Block for solder bump application; UMC 40nm LP/RVT Logic Process
DDR3 Combo PHY Compensation Block for solder bump application; UMC 40nm LP/RVT Logic Process
Compensation Block of DDR3/DDR3L/DDR2/LPDDR2/LPDDR Combo PHY for SIP Application; UMC 28nm HPC/RVT LowK Logic Process
DDR3 Combo PHY COMM/ADDR Block for 2-rank and solder bump application; UMC 40nm LP/RVT Logic Process
DDR3 Combo PHY COMM/ADDR Block for 2-rank and solder bump application; UMC 40nm LP/RVT Logic Process
DDR3 Combo PHY COMM/ADDR Block for 2-rank and solder bump application; UMC 40nm LP/RVT Logic Process
DDR3 Combo PHY COMM/ADDR Block for 2-rank and solder bump application; UMC 40nm LP/RVT Logic Process
Command/Address Block of DDR3/DDR3L/DDR2/LPDDR2/LPDDR Combo PHY for Chip Application (compliant to DFI); UMC 55nm SP/RVT LowK Log…
UMC 55NM SP-RVT with 2.5V device DDR23 COMBO PHY CMD/ADDR Block for 2 layer PCB board usage
UMC 55NM SP-RVT with 2.5V device DDR23 COMBO PHY CMD/ADDR Block for 2 layer PCB board usage