The Neural-Network Accelerators (NACC) improves the inference performance of neural networks.
- NPU
Semiconductor IP cores (Intellectual Property cores) are reusable design blocks used in SoC and ASIC development to accelerate time-to-market and reduce design complexity.
These IP cores span a broad range of technologies, including Analog & Mixed Signal, Compute Acceleration, Graphics & Vision, Interface Connectivity , Memory Interfaces, Security, Wireless, System Peripheral, Embedded Memories, and Foundation Libraries. The catalog covers everything from analog front-ends, data converters, processors, DSPs, AI accelerators, and imaging solutions to high-speed connectivity, memory controllers and PHYs, cryptographic engines, embedded memory macros, standard cell libraries, and wireless communication IP.
This catalog allows you to explore and compare IP cores from leading vendors, based on performance, power, process node compatibility, and application domain.
Whether you are designing for automotive, wireless communication, consumer electronics, or data centers, you can find the right IP solutions for your system requirements.
The Neural-Network Accelerators (NACC) improves the inference performance of neural networks.
Protocol controller IP for a CAN FD light responder node
The FDLR_CAN is a CAN IP module that can be implemented in an ASIC, FPGA, and mixed-signal device.It supports CAN FD light respon…
Protocol controller IP for Classical CAN / CAN FD / CAN FD light commander and CAN XL
The XS_CAN is a low gate count CAN IP module that can be realized as stand-alone device, as part of an SoC, as part of an ASIC, o…
PCIe 6.0 PHY, SS SF2A x4 1.2V, N/S for Automotive, ASIL B Random, AEC-Q100 Grade 2
The multi-channel Synopsys PHY IP for PCI Express® (PCIe®) 6.0 meets today’s demands for higher bandwidth and power efficiency ac…
Compliant to NVM Express 1.4 specification
Compliant with CXL Specification 2.0
Compliant to PCI Express base specification 5.0
Verification IP for CAN XL, FD and CAN 2.0
A comprehensive VIP solution portfolio for CAN XL, CAN FD and CAN 2.0 used by SoC and IP designers to ensure comprehensive verifi…
PUF FPGA-Xilinx Premium with key wrap
FPGAs are widely used in mission-critical environments with specific processing needs.
ASIL-B Ready PUF Hardware Premium with key wrap and certification support
Anything that is connected to the internet is at risk, and connected vehicles are no exception.
ASIL-B Ready PUF Hardware Base
Anything that is connected to the internet is at risk, and connected vehicles are no exception.
PUF Software Premium with key wrap and certification support
The number of connected devices, machines, sensors, or things that are linked with each other over open communication networks on…
Host Library for HDCP 2.3 on HDMI/DP Embedded Security Modules (generation 3)
The Multiport/Multiprotocol HDCP 2.2/2.3 Embedded Security Modules (ESMs) are autonomous modules that provide designers with and …
HDCP 2 on HDMI / DisplayPort Embedded Security Module Firmware (generation 3)
The Multiport/Multiprotocol HDCP 2.2/2.3 Embedded Security Modules (ESMs) are autonomous modules that provide designers with and …
The Multiport/Multiprotocol HDCP 2.2/2.3 Embedded Security Modules (ESMs) are autonomous modules that provide designers with and …
The Multiport/Multiprotocol HDCP 2.2/2.3 Embedded Security Modules (ESMs) are autonomous modules that provide designers with and …
1-port Receiver/Transmitter HDCP 2.3 on HDMI 2.0 or DisplayPort 1.4/2.0 ESM (generation 3)
The Multiport/Multiprotocol HDCP 2.2/2.3 Embedded Security Modules (ESMs) are autonomous modules that provide designers with and …
The I²C slave to AHB bridge core is a I²C slave that provides a link between the I²C bus and AMBA AHB.
The SPI to AHB bridge is an SPI slave that provides a link between a SPI bus (that consists of two data signals, one clock signal…
The 1394 OVC is a fully documented, off-the-shelf component using the Open Verification Methodology for quickly enabling function…