Vendor: WebM - Open Web Media Project Category: Video Processing

WebM VP9 Hardware Decoder

WebM’s G2 VP9 Decoder IP is the latest addition to WebM family of hardware IP products for multimedia system-on-chip designs.

Contact Provider Request Datasheet

TSMC 28nm Silicon Proven View all specifications

Overview

WebM’s G2 VP9 Decoder IP is the latest addition to WebM family of hardware IP products for multimedia system-on-chip designs. G2 is the first decoder IP to implement VP9 in hardware, delivering next-generation performance and power efficiency, and enabling up to 4K (2160p 60FPS) resolution playback on smart TVs, PCs and post-PC consumer devices.

As with our VP8 hardware IPs, G2 is currently available to semiconductor companies having firm plans to ship VP9-supporting products. A written, no-cost agreement is required.

Key features

Decoding of VP9 bitstreams with YCbCr 4:2:0 color format
8-bits per color channel
Maximum decodable frame resolution: 4096 x 2304 pixels
Output frame formats:

Reference frame: YCbCr4:2:0 Semi-planar 4x4 tiled format
Post-processed output frame: YCbCr4:2:0 raster scan format

SoC connectivity:

64/128 bit AXI master
AXI, AHB or APB slave
Configurable endianness

Block Diagram

G2 VP9 Video Decoder block diagram

Benefits

WebM G2 enables 4K (2160p) VP9 playback on high-end consumer devices. The design is scalable to meet up to 2160p@60fps decode requirements with a single core, minimizing the silicon area and decoding latency.

Applications

Youtube playback on consumer devices, such as DTV, STB, smart phones and tablets.

What’s Included?

The standard G2 delivery package includes all required source code to integrate the decoder with the actual SoC.

VHDL or Verilog source code
Driver source code in ANSI C, including API for application integration
Software test bench
RTL test bench
Comprehensive test suite for SoC integration and verification
Synthesis script templates for Synopsys Design Compiler

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Silicon Options

Foundry	Node	Process	Maturity
TSMC	28nm	28nm 280 nm	Silicon Proven

Specifications

Identity

Part Number

G2 VP9 Video Decoder

Vendor

WebM - Open Web Media Project

Provider

WebM - Open Web Media Project

HQ: Finland

Intended for chipsets and ASICs targeting multimedia devices (HD set-top boxes, mobile devices, netbooks, webcams, etc.), the WebM encoder and decoder hardware IP is built on technology developed by Google’s Oulu, Finland office. This group has developed silicon-proven designs deployed in hundreds of millions of chips worldwide, and provides semiconductor manufacturers with a minimal-risk solution for integrating WebM video capability with their chipsets. The WebM video hardware IP designs support encoding and decoding WebM/VP8 video up to 1080p resolution. Implemented as RTL source code (VHDL or Verilog), both WebM IP designs are currently available to semiconductor companies having firm plans to ship VP8-supporting products. A written, no-cost agreement is required. Visit www.webmproject.org/hardware for more details.

Contact WebM - Open Web Media Project

Frequently asked questions about Video Processing IP

What is WebM VP9 Hardware Decoder?

WebM VP9 Hardware Decoder is a Video Processing IP core from WebM - Open Web Media Project listed on Semi IP Hub. It is listed with support for tsmc Silicon Proven.

How should engineers evaluate this Video Processing?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Video Processing IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.