Precision Time Protocol or PTP or IEEE1588 is one such protocol that allows synchronization of an order of 1us with the master (m…
- IEEE-1588 / PTP
Precision Time Protocol or PTP or IEEE1588 is one such protocol that allows synchronization of an order of 1us with the master (m…
External Flash Memory Interface IP
Flash memory forms a basic constituent in many FPGA based embedded systems using Xilinx SRAM based FPGAs.
Generation of clock signal with a fixed but programmable phase difference with respect to a reference input clock is critical in …
The demand for high-speed data connection services develops in tandem with the number of internet users and multimedia apps.
multiple users and data streams must be processed concurrently in a contemporary communication system based on existing 4G and fu…
Quadrature Amplitude Modulation: Modulator and Demodulator
QAM Modulator and Demodulator combine two amplitude modulation signals into a single data transfer channel: 1.
Crest Factor Reduction IP Core
Crest Factor Reduction (CFR) is a technique for lowering a waveform’s power ratio from higher to average.
Open Radio Access Networks (Open-RAN) for 5G
5G radio, improves spectral efficiency while offering unrivaled network capacity.
Digital Predistortion (DPD) IP Core
The next fifth-generation (5G) wireless networks promise connection speeds and data rates that are 100 times faster than current …
The 18-bit Pipeline DSP slice IP Core provides the best utilization of device resources like memory, I/O, processor and clock.
An interpolating filter chain, numerically controlled oscillator, and mixer comprise the DUC.
Multi Protocol Synchronous Serial Engine IP
The developed IP integrates basic serial interface protocols like UART, SPI and I2C into a single AXI interface port.
FSK Demodulator,BCH Decoder,Command Decoder,Validator,Convolution Encoder IPs
A lot of development for implementing communication subsystem for a student nano-satellite was also undertaken.
Analog Data Acquisition Controller IP
The analog data acquisition controller IP interfaces various industry standard ADCs with digital interfaces like SPI, I2C, parall…
Improved Analog to Digital Converter IP
IP
Digital PID Controller Loop Algorithms for EMA
We have developed control system algorithm IP blocks to be able to control electromagnetic actuators.
Various onboard diagnostics protocols are currently available to be used for assembly line connectivity to various nodes etc.
Ethernet Filters for Precision Time Protocol on Automotive Ethernet
Various systems used in a car like Driver Assist System (ADAS) and Time-Sensitive Network (TSN) typically require large bandwidth…
Our analog-to-digital converter is a configurationally general-purpose ADC that uses a traditional Charge-Redistribution SAR arch…
The Serial ATA Host IP Core provides an interface to high-speed serial link replacements for the parallel ATA attachment of mass …