Vendor: SmartDV Technologies Category: V-By-One

VBYONE Verification IP

V-By-One HS is the serial communication protocol developed by Thine Electronics, Inc to support the higher frame rates and the hi…

Contact Provider Request Datasheet

Overview

V-By-One HS is the serial communication protocol developed by Thine Electronics, Inc to support the higher frame rates and the higher resolutions required by advancing FPD technologies. V-By-One HS VIP can be used to verify transmitter or Receiver device following the V-By-One HS basic protocol as defined in V-By-One HS.

VBYONE Verification IP is supported natively in SystemVerilog, VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA, Specman E and non-standard verification env

VBYONE Verification IP comes with optional Smart Visual Protocol Debugger (Smart ViPDebug), which is GUI based debugger to speed up debugging.

Key features

  • Follows VByOne specification as v1.2/1.3/1.4/1.5
  • Support transmitter and Receiver Mode.
  • Supports upto 32 serial lanes.
  • Supports all byte lengths, color depths, and resolutions.
  • Supports lane skew insertion in transmitter mode.
  • Supports disparity and invalid code insertion in 8b/10b.
  • Supports 10 bit, 20 bit, 40 bit parallel interface.
  • Supports insertion of scrambler errors.
  • Supports scrambler as in V-By-One HS specification.
  • Supports on the fly generation of data.
  • Supports skip ALN training patterns.
  • Detects and reports the following errors,
    • Invalid control character injection
    • Invalid data character injection
    • Invalid 10bit code injection
    • Sync errors
    • Scrambler errors
    • Disparity errors
    • Alignment errors
  • VIP can be connected to DUT at following interfaces - Serial interface : txn, txp
  • Functional coverage to cover each and every feature of the VByOne specification
  • Test suite to test each and every feature of VByOne specification.
  • Status counters for various events on bus.
  • Supports constraints Randomization.
  • Callbacks in Transmitter and Receiver for various events.

Block Diagram

V-By-One VIP block diagram

Benefits

  • Faster testbench development and more complete verification of V-By-One HS designs.
  • Easy to use command interface simplifies testbench control and configuration of receiver and transmitter.
  • Simplifies results analysis.
  • Runs in every major simulation environment.

What’s Included?

  • Complete regression suite containing all the V-By-One HS testcases.
  • Examples showing how to connect various components, and usage of Transmitter, Receiver and Monitor.
  • Detailed documentation of all class, task and function's used in verification env.
  • Documentation contains User's Guide and Release notes.

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Specifications

Identity

Part Number
V-By-One VIP
Vendor
SmartDV Technologies

Provider

SmartDV Technologies
HQ: India
At SmartDV Technologies™, we believe there’s a better way to approach semiconductor intellectual property (IP) for integrated circuits. We’ve been focused exclusively on IP since 2007—so whether you’re sourcing standards-based design IP for your next SoC, ASIC, or FPGA, or seeking verification solutions (VIP) to put your chip design through its paces, you’ll find SmartDV’s IP straightforward to integrate. By combining proprietary SmartCompiler™ technology with the knowledge of hundreds of expert engineers, SmartDV can customize IP to meet your unique design objectives: quickly, economically, and reliably. Don’t allow other suppliers to force onesize-fits-all cores into your chip design. Get the IP you need, tailored to your specifications, with SmartDV: IP Your Way.
Contact SmartDV Technologies

Learn more about V-By-One IP core

The Benefits of a Multi-Protocol PMA

At Silicon Creations, we have developed a power and area optimized, flexible and programmable PMA (Physical Medium Attachment) architecture that can be reliably ported to different process nodes and scaled across protocol generations as data rates increase. It is called the Multi-Protocol PMA, or MP-PMA for short.

Frequently asked questions about V-by-One IP cores

What is VBYONE Verification IP?

VBYONE Verification IP is a V-By-One IP core from SmartDV Technologies listed on Semi IP Hub.

How should engineers evaluate this V-By-One?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this V-By-One IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

×
Semiconductor IP