Vendor: SmartDV Technologies Category: V-By-One

VBYONE Synthesizable Transactor

VByOneHS Synthesizable Transactor provides an smart way to verify the VByOneHS component of a SOC or a ASIC in Emulator or FPGA p…

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Overview

VByOneHS Synthesizable Transactor provides an smart way to verify the VByOneHS component of a SOC or a ASIC in Emulator or FPGA platform. The SmartDV's VByOneHS Synthesizable Transactor is fully compliant with standard VByOne specification as 1.2/1.3/1.4/1.5 Specification and provides the following features.

Key features

  • Follows VByOne specification as 1.2/1.3/1.4/1.5
  • Support transmitter and Receiver Mode
  • Supports upto 32 serial lanes
  • Supports all byte lengths, color depths, and resolutions
  • Supports lane skew insertion in transmitter mode
  • Supports disparity and invalid code insertion in 8b/10b
  • Supports 10 bit, 20 bit, 40 bit parallel interface
  • Supports insertion of scrambler errors
  • Supports scrambler as in VByOneHS specification
  • Support on the fly generation of data
  • Supports detection and reporting the following errors
    • Invalid control character injection
    • Invalid data character injection
    • Invalid 10bit code injection
    • Sync errors
    • Scrambler errors
    • Disparity errors
    • Alignment errors

Block Diagram

V-By-One Transactor block diagram

Benefits

  • Compatible with testbench writing using SmartDV's VIP
  • All UVM sequences/testcases written with VIP can be reused
  • Runs in every major emulators environment
  • Runs in custom FPGA platforms

What’s Included?

  • Synthesiable transactors
  • Complete regression suite containing all the VByOneHS testcases
  • Examples showing how to connect various components, and usage of Synthesiable VIP
  • Detailed documentation of all DPI, class, task and functions used in verification env
  • Documentation also contains User's Guide and Release notes

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Specifications

Identity

Part Number
V-By-One Transactor
Vendor
SmartDV Technologies

Provider

SmartDV Technologies
HQ: India
At SmartDV Technologies™, we believe there’s a better way to approach semiconductor intellectual property (IP) for integrated circuits. We’ve been focused exclusively on IP since 2007—so whether you’re sourcing standards-based design IP for your next SoC, ASIC, or FPGA, or seeking verification solutions (VIP) to put your chip design through its paces, you’ll find SmartDV’s IP straightforward to integrate. By combining proprietary SmartCompiler™ technology with the knowledge of hundreds of expert engineers, SmartDV can customize IP to meet your unique design objectives: quickly, economically, and reliably. Don’t allow other suppliers to force onesize-fits-all cores into your chip design. Get the IP you need, tailored to your specifications, with SmartDV: IP Your Way.
Contact SmartDV Technologies

Learn more about V-By-One IP core

The Benefits of a Multi-Protocol PMA

At Silicon Creations, we have developed a power and area optimized, flexible and programmable PMA (Physical Medium Attachment) architecture that can be reliably ported to different process nodes and scaled across protocol generations as data rates increase. It is called the Multi-Protocol PMA, or MP-PMA for short.

Frequently asked questions about V-by-One IP cores

What is VBYONE Synthesizable Transactor?

VBYONE Synthesizable Transactor is a V-By-One IP core from SmartDV Technologies listed on Semi IP Hub.

How should engineers evaluate this V-By-One?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this V-By-One IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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