Vendor:
Synopsys, Inc.
Category:
USB
USB 3.1/DisplayPort 1.3 Controller IP Solutions
The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum.
Overview
The Synopsys SuperSpeed 3.1 USB IP solution is based on the USB 3.0 specification from the USB Implementer Forum. The comprehensive USB 3.1 IP offering consists of Host, Device, and Dual-Role Device controllers, PHYs with and without support for the USB Type-C™ connectivity specification and DisplayPort 1.3 support, verification IP, IP Prototyping Kits, and IP software development kits. These elements enable quick development of advanced chip designs incorporating the 10 Gbps SuperSpeed USB standard.
The Synopsys USB 3.1 IP is targeted for integration into SoCs for media storage, creation, and playback devices, requiring faster bandwidth
between PCs and portable electronic devices. Optimized for low power, the Synopsys USB 3.1 Controller and PHY IP allow designers to maximize power efficiency for extended battery life. The Synopsys USB 3.1 IP enables the fastest SuperSpeed USB data transfer speeds while lowering overall power consumption.
As the leading supplier of USB IP, Synopsys provides designers with a high- performance, low-power, and area-efficient IP solution, for cost-effective integration into system-on-chip designs. Synopsys’ expertise in developing and supporting USB enables us to build a low risk, high quality SuperSpeed USB IP solution.
The Synopsys USB 3.1 IP is targeted for integration into SoCs for media storage, creation, and playback devices, requiring faster bandwidth
between PCs and portable electronic devices. Optimized for low power, the Synopsys USB 3.1 Controller and PHY IP allow designers to maximize power efficiency for extended battery life. The Synopsys USB 3.1 IP enables the fastest SuperSpeed USB data transfer speeds while lowering overall power consumption.
As the leading supplier of USB IP, Synopsys provides designers with a high- performance, low-power, and area-efficient IP solution, for cost-effective integration into system-on-chip designs. Synopsys’ expertise in developing and supporting USB enables us to build a low risk, high quality SuperSpeed USB IP solution.
Key features
- Lowest risk: Based on proven USB 3.0 controller shipped in 100s of millions of units
- Lowest power: Extend battery life in mobile devices (USB power saving modes, Uniform Power Format, hibernation option with dual power rails)
- Configurable data buffering options to optimize performance vs area
- Supports all USB speed modes
- Host, Device, and Dual Role Device controllers meet the needs for all markets
- USB-C 3.1 DisplayPort 1.3 TX Controller includes HDCP 2.2 content protection
Benefits
- Supports SuperSpeed USB 3.1 at 10 Gbps, SuperSpeed USB 3.0 at 5 Gbps, and High- Speed USB (USB 2.0)
- Optimized Host, Device, and Dual- Role Device controller IP designed to achieve lowest power and area for portable electronics
- Synopsys USB-C 3.1/DisplayPort
- 1.3 TX PHYs and controllers offer high-performance throughput for 4K and 8K display
- Supports PIPE and UTMI+ PHY interfaces
- Architectural features reduce power consumption
- Complete Synopsys USB solutions for USB 3.1 consist of controllers, PHYs, verification IP, IP Prototyping Kits, and IP Software Development Kits
- SuperSpeed USB IP offering from the #1 provider of USB IP for thirteen years in a row (Gartner 2014)
What’s Included?
- Synopsys coreConsultant tool
- Verilog RTL source code
- ASIC and FPGA synthesis, ATPG, DFT, power scripts
- UVM Testbench with native SystemVerilog Verification IP for USB
- Comprehensive databook and integration guides
- Reference drivers to speed development
- USB-C 3.1 DisplayPort 1.3 TX Controller includes HDCP 2.2 firmware and host API library SDK
Files
Note: some files may require an NDA depending on provider policy.
Specifications
Identity
Part Number
dwc_usbc31_dp_13_controller
Vendor
Synopsys, Inc.
Provider
Synopsys, Inc.
HQ:
USA
Synopsys is a leading provider of high-quality, silicon-proven semiconductor IP solutions for SoC designs. The broad Synopsys IP portfolio includes logic libraries, embedded memories, analog IP, wired and wireless interface IP, security IP, embedded processors and subsystems. To accelerate IP integration, software development, and silicon bring-up, Synopsys’ IP Accelerated initiative provides architecture design expertise, pre-verified and customizable IP subsystems, hardening, and signal/power integrity analysis. Synopsys' extensive investment in IP quality, comprehensive technical support and robust IP development methodology enables designers to reduce integration risk and accelerate time-to-market.
Learn more about USB IP core
Exploring USB Applications and the Impact of USB IP
Understanding USB IP and Its Role in SOC Integration
What Designers Need to Know About USB Low-Power States
In addition to performance and interoperability, achieving low power has been one of the requirements for industry standards specifications. Some of the key specifications like Universal Serial Bus (USB), PCI Express (PCIe), and MIPI have defined power saving features for burst traffic. This whitepaper explains how Synopsys USB IP offers low power using various low power states that go beyond the basic features.
New USB 80Gbps Specification Boosts Data Rate, Enables Four Protocols on One Bus
Gervais Fong, Synopsys
New USB Device Class Specification Broadens Use Cases for I3C and I3C Basic
Sharmion Kerley, MIPI Alliance
Frequently asked questions about USB IP cores
What is USB 3.1/DisplayPort 1.3 Controller IP Solutions?
USB 3.1/DisplayPort 1.3 Controller IP Solutions is a USB IP core from Synopsys, Inc. listed on Semi IP Hub.
How should engineers evaluate this USB?
Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this USB IP.
Can this semiconductor IP be compared with similar products?
Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.